459 lines
10 KiB
C
459 lines
10 KiB
C
/*
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* Copyright (c) 2018 PHYTEC Messtechnik GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT solomon_ssd1306fb
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(ssd1306, CONFIG_DISPLAY_LOG_LEVEL);
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#include <string.h>
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <zephyr/drivers/display.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/spi.h>
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#include <zephyr/kernel.h>
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#include "ssd1306_regs.h"
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#if DT_INST_PROP(0, segment_remap) == 1
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#define SSD1306_PANEL_SEGMENT_REMAP true
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#else
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#define SSD1306_PANEL_SEGMENT_REMAP false
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#endif
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#if DT_INST_PROP(0, com_invdir) == 1
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#define SSD1306_PANEL_COM_INVDIR true
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#else
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#define SSD1306_PANEL_COM_INVDIR false
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#endif
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#if DT_INST_PROP(0, com_sequential) == 1
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#define SSD1306_COM_PINS_HW_CONFIG SSD1306_SET_PADS_HW_SEQUENTIAL
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#else
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#define SSD1306_COM_PINS_HW_CONFIG SSD1306_SET_PADS_HW_ALTERNATIVE
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#endif
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#define SSD1306_PANEL_NUMOF_PAGES (DT_INST_PROP(0, height) / 8)
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#define SSD1306_CLOCK_DIV_RATIO 0x0
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#define SSD1306_CLOCK_FREQUENCY 0x8
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#define SSD1306_PANEL_VCOM_DESEL_LEVEL 0x20
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#define SSD1306_PANEL_PUMP_VOLTAGE SSD1306_SET_PUMP_VOLTAGE_90
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#ifndef SSD1306_ADDRESSING_MODE
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#define SSD1306_ADDRESSING_MODE (SSD1306_SET_MEM_ADDRESSING_HORIZONTAL)
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#endif
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struct ssd1306_config {
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#if DT_INST_ON_BUS(0, i2c)
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struct i2c_dt_spec bus;
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#elif DT_INST_ON_BUS(0, spi)
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struct spi_dt_spec bus;
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struct gpio_dt_spec data_cmd;
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#endif
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struct gpio_dt_spec reset;
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};
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struct ssd1306_data {
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uint8_t contrast;
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uint8_t scan_mode;
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};
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#if DT_INST_ON_BUS(0, i2c)
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static inline bool ssd1306_bus_ready(const struct device *dev)
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{
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const struct ssd1306_config *config = dev->config;
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return device_is_ready(config->bus.bus);
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}
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static inline int ssd1306_write_bus(const struct device *dev,
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uint8_t *buf, size_t len, bool command)
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{
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const struct ssd1306_config *config = dev->config;
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return i2c_burst_write_dt(&config->bus,
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command ? SSD1306_CONTROL_ALL_BYTES_CMD :
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SSD1306_CONTROL_ALL_BYTES_DATA,
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buf, len);
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}
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#elif DT_INST_ON_BUS(0, spi)
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static inline bool ssd1306_bus_ready(const struct device *dev)
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{
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const struct ssd1306_config *config = dev->config;
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if (gpio_pin_configure_dt(&config->data_cmd, GPIO_OUTPUT_INACTIVE) < 0) {
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return false;
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}
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return spi_is_ready_dt(&config->bus);
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}
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static inline int ssd1306_write_bus(const struct device *dev,
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uint8_t *buf, size_t len, bool command)
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{
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const struct ssd1306_config *config = dev->config;
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int errno;
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gpio_pin_set_dt(&config->data_cmd, command ? 0 : 1);
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struct spi_buf tx_buf = {
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.buf = buf,
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.len = len
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};
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struct spi_buf_set tx_bufs = {
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.buffers = &tx_buf,
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.count = 1
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};
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errno = spi_write_dt(&config->bus, &tx_bufs);
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return errno;
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}
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#endif
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static inline int ssd1306_set_panel_orientation(const struct device *dev)
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{
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uint8_t cmd_buf[] = {
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(SSD1306_PANEL_SEGMENT_REMAP ?
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SSD1306_SET_SEGMENT_MAP_REMAPED :
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SSD1306_SET_SEGMENT_MAP_NORMAL),
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(SSD1306_PANEL_COM_INVDIR ?
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SSD1306_SET_COM_OUTPUT_SCAN_FLIPPED :
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SSD1306_SET_COM_OUTPUT_SCAN_NORMAL)
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};
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return ssd1306_write_bus(dev, cmd_buf, sizeof(cmd_buf), true);
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}
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static inline int ssd1306_set_timing_setting(const struct device *dev)
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{
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uint8_t cmd_buf[] = {
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SSD1306_SET_CLOCK_DIV_RATIO,
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(SSD1306_CLOCK_FREQUENCY << 4) | SSD1306_CLOCK_DIV_RATIO,
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SSD1306_SET_CHARGE_PERIOD,
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DT_INST_PROP(0, prechargep),
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SSD1306_SET_VCOM_DESELECT_LEVEL,
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SSD1306_PANEL_VCOM_DESEL_LEVEL
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};
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return ssd1306_write_bus(dev, cmd_buf, sizeof(cmd_buf), true);
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}
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static inline int ssd1306_set_hardware_config(const struct device *dev)
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{
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uint8_t cmd_buf[] = {
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SSD1306_SET_START_LINE,
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SSD1306_SET_DISPLAY_OFFSET,
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DT_INST_PROP(0, display_offset),
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SSD1306_SET_PADS_HW_CONFIG,
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SSD1306_COM_PINS_HW_CONFIG,
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SSD1306_SET_MULTIPLEX_RATIO,
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DT_INST_PROP(0, multiplex_ratio)
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};
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return ssd1306_write_bus(dev, cmd_buf, sizeof(cmd_buf), true);
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}
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static inline int ssd1306_set_charge_pump(const struct device *dev)
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{
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uint8_t cmd_buf[] = {
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#if defined(CONFIG_SSD1306_DEFAULT)
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SSD1306_SET_CHARGE_PUMP_ON,
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SSD1306_SET_CHARGE_PUMP_ON_ENABLED,
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#endif
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#if defined(CONFIG_SSD1306_SH1106_COMPATIBLE)
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SH1106_SET_DCDC_MODE,
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SH1106_SET_DCDC_ENABLED,
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#endif
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SSD1306_PANEL_PUMP_VOLTAGE,
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};
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return ssd1306_write_bus(dev, cmd_buf, sizeof(cmd_buf), true);
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}
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static int ssd1306_resume(const struct device *dev)
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{
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uint8_t cmd_buf[] = {
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SSD1306_DISPLAY_ON,
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};
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return ssd1306_write_bus(dev, cmd_buf, sizeof(cmd_buf), true);
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}
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static int ssd1306_suspend(const struct device *dev)
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{
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uint8_t cmd_buf[] = {
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SSD1306_DISPLAY_OFF,
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};
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return ssd1306_write_bus(dev, cmd_buf, sizeof(cmd_buf), true);
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}
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static int ssd1306_write(const struct device *dev, const uint16_t x, const uint16_t y,
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const struct display_buffer_descriptor *desc,
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const void *buf)
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{
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size_t buf_len;
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if (desc->pitch < desc->width) {
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LOG_ERR("Pitch is smaller then width");
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return -1;
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}
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buf_len = MIN(desc->buf_size, desc->height * desc->width / 8);
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if (buf == NULL || buf_len == 0U) {
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LOG_ERR("Display buffer is not available");
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return -1;
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}
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if (desc->pitch > desc->width) {
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LOG_ERR("Unsupported mode");
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return -1;
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}
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if ((y & 0x7) != 0U) {
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LOG_ERR("Unsupported origin");
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return -1;
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}
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LOG_DBG("x %u, y %u, pitch %u, width %u, height %u, buf_len %u",
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x, y, desc->pitch, desc->width, desc->height, buf_len);
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#if defined(CONFIG_SSD1306_DEFAULT)
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uint8_t cmd_buf[] = {
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SSD1306_SET_MEM_ADDRESSING_MODE,
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SSD1306_ADDRESSING_MODE,
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SSD1306_SET_COLUMN_ADDRESS,
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x,
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(x + desc->width - 1),
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SSD1306_SET_PAGE_ADDRESS,
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y/8,
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((y + desc->height)/8 - 1)
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};
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if (ssd1306_write_bus(dev, cmd_buf, sizeof(cmd_buf), true)) {
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LOG_ERR("Failed to write command");
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return -1;
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}
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return ssd1306_write_bus(dev, (uint8_t *)buf, buf_len, false);
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#elif defined(CONFIG_SSD1306_SH1106_COMPATIBLE)
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uint8_t x_offset = x + DT_INST_PROP(0, segment_offset);
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uint8_t cmd_buf[] = {
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SSD1306_SET_LOWER_COL_ADDRESS |
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(x_offset & SSD1306_SET_LOWER_COL_ADDRESS_MASK),
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SSD1306_SET_HIGHER_COL_ADDRESS |
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((x_offset >> 4) & SSD1306_SET_LOWER_COL_ADDRESS_MASK),
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SSD1306_SET_PAGE_START_ADDRESS | (y / 8)
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};
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uint8_t *buf_ptr = (uint8_t *)buf;
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for (uint8_t n = 0; n < desc->height / 8; n++) {
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cmd_buf[sizeof(cmd_buf) - 1] =
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SSD1306_SET_PAGE_START_ADDRESS | (n + (y / 8));
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LOG_HEXDUMP_DBG(cmd_buf, sizeof(cmd_buf), "cmd_buf");
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if (ssd1306_write_bus(dev, cmd_buf, sizeof(cmd_buf), true)) {
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return -1;
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}
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if (ssd1306_write_bus(dev, buf_ptr, desc->width, false)) {
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return -1;
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}
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buf_ptr = buf_ptr + desc->width;
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if (buf_ptr > ((uint8_t *)buf + buf_len)) {
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LOG_ERR("Exceeded buffer length");
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return -1;
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}
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}
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#endif
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return 0;
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}
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static int ssd1306_read(const struct device *dev, const uint16_t x,
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const uint16_t y,
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const struct display_buffer_descriptor *desc,
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void *buf)
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{
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LOG_ERR("Unsupported");
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return -ENOTSUP;
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}
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static void *ssd1306_get_framebuffer(const struct device *dev)
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{
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LOG_ERR("Unsupported");
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return NULL;
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}
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static int ssd1306_set_brightness(const struct device *dev,
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const uint8_t brightness)
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{
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LOG_WRN("Unsupported");
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return -ENOTSUP;
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}
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static int ssd1306_set_contrast(const struct device *dev, const uint8_t contrast)
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{
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uint8_t cmd_buf[] = {
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SSD1306_SET_CONTRAST_CTRL,
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contrast,
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};
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return ssd1306_write_bus(dev, cmd_buf, sizeof(cmd_buf), true);
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}
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static void ssd1306_get_capabilities(const struct device *dev,
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struct display_capabilities *caps)
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{
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memset(caps, 0, sizeof(struct display_capabilities));
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caps->x_resolution = DT_INST_PROP(0, width);
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caps->y_resolution = DT_INST_PROP(0, height);
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caps->supported_pixel_formats = PIXEL_FORMAT_MONO10;
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caps->current_pixel_format = PIXEL_FORMAT_MONO10;
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caps->screen_info = SCREEN_INFO_MONO_VTILED;
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}
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static int ssd1306_set_orientation(const struct device *dev,
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const enum display_orientation
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orientation)
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{
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LOG_ERR("Unsupported");
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return -ENOTSUP;
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}
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static int ssd1306_set_pixel_format(const struct device *dev,
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const enum display_pixel_format pf)
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{
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if (pf == PIXEL_FORMAT_MONO10) {
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return 0;
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}
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LOG_ERR("Unsupported");
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return -ENOTSUP;
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}
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static int ssd1306_init_device(const struct device *dev)
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{
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const struct ssd1306_config *config = dev->config;
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uint8_t cmd_buf[] = {
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SSD1306_SET_ENTIRE_DISPLAY_OFF,
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#ifdef CONFIG_SSD1306_REVERSE_MODE
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SSD1306_SET_REVERSE_DISPLAY,
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#else
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SSD1306_SET_NORMAL_DISPLAY,
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#endif
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};
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/* Reset if pin connected */
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if (config->reset.port) {
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k_sleep(K_MSEC(SSD1306_RESET_DELAY));
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gpio_pin_set_dt(&config->reset, 1);
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k_sleep(K_MSEC(SSD1306_RESET_DELAY));
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gpio_pin_set_dt(&config->reset, 0);
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}
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/* Turn display off */
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if (ssd1306_suspend(dev)) {
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return -EIO;
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}
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if (ssd1306_set_timing_setting(dev)) {
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return -EIO;
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}
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if (ssd1306_set_hardware_config(dev)) {
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return -EIO;
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}
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if (ssd1306_set_panel_orientation(dev)) {
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return -EIO;
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}
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if (ssd1306_set_charge_pump(dev)) {
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return -EIO;
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}
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if (ssd1306_write_bus(dev, cmd_buf, sizeof(cmd_buf), true)) {
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return -EIO;
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}
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if (ssd1306_set_contrast(dev, CONFIG_SSD1306_DEFAULT_CONTRAST)) {
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return -EIO;
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}
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ssd1306_resume(dev);
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return 0;
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}
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static int ssd1306_init(const struct device *dev)
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{
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const struct ssd1306_config *config = dev->config;
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LOG_DBG("");
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if (!ssd1306_bus_ready(dev)) {
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LOG_ERR("Bus device %s not ready!", config->bus.bus->name);
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return -EINVAL;
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}
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if (config->reset.port) {
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int ret;
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ret = gpio_pin_configure_dt(&config->reset,
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GPIO_OUTPUT_INACTIVE);
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if (ret < 0) {
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return ret;
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}
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}
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if (ssd1306_init_device(dev)) {
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LOG_ERR("Failed to initialize device!");
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return -EIO;
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}
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return 0;
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}
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static const struct ssd1306_config ssd1306_config = {
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#if DT_INST_ON_BUS(0, i2c)
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.bus = I2C_DT_SPEC_INST_GET(0),
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#elif DT_INST_ON_BUS(0, spi)
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.bus = SPI_DT_SPEC_INST_GET(
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0, SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8), 0),
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.data_cmd = GPIO_DT_SPEC_INST_GET(0, data_cmd_gpios),
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#endif
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.reset = GPIO_DT_SPEC_INST_GET_OR(0, reset_gpios, { 0 })
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};
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static struct ssd1306_data ssd1306_driver;
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static struct display_driver_api ssd1306_driver_api = {
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.blanking_on = ssd1306_suspend,
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.blanking_off = ssd1306_resume,
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.write = ssd1306_write,
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.read = ssd1306_read,
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.get_framebuffer = ssd1306_get_framebuffer,
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.set_brightness = ssd1306_set_brightness,
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.set_contrast = ssd1306_set_contrast,
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.get_capabilities = ssd1306_get_capabilities,
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.set_pixel_format = ssd1306_set_pixel_format,
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.set_orientation = ssd1306_set_orientation,
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};
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DEVICE_DT_INST_DEFINE(0, ssd1306_init, NULL,
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&ssd1306_driver, &ssd1306_config,
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POST_KERNEL, CONFIG_DISPLAY_INIT_PRIORITY,
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&ssd1306_driver_api);
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