97 lines
2.9 KiB
C
97 lines
2.9 KiB
C
/*
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* Copyright (c) 2015 Intel Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file Header file for the MMIO-based GPIO driver.
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*/
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#ifndef _GPIO_MMIO_H_
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#define _GPIO_MMIO_H_
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#include <nanokernel.h>
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#include <gpio.h>
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/* For enable register:
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* NORMAL: 0 - disable, 1 - enable
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* INV: 0 - enable, 1 - disable
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*/
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#define GPIO_MMIO_CFG_EN_NORMAL (0 << 0)
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#define GPIO_MMIO_CFG_EN_INV (1 << 0)
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#define GPIO_MMIO_CFG_EN_MASK (1 << 0)
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/* For direction register:
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* NORMAL: 0 - pin is output, 1 - pin is input
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* INV: 0 - pin is input, 1 - pin is output
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*/
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#define GPIO_MMIO_CFG_DIR_NORMAL (0 << 1)
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#define GPIO_MMIO_CFG_DIR_INV (1 << 1)
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#define GPIO_MMIO_CFG_DIR_MASK (1 << 1)
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/**
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* @brief Initialization function for GPIO driver
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*
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* @param dev Device struct
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* @return DEV_OK if successful, failed otherwise
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*/
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extern int gpio_mmio_init(struct device *dev);
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/* internal use only for register access function */
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typedef uint32_t (*__gpio_mmio_access_t)(uint32_t addr, uint32_t bit,
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uint32_t value);
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/** Configuration data */
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struct gpio_mmio_config {
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/* config flags */
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uint32_t cfg_flags;
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struct {
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/* enable register */
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uint32_t en;
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/* direction register */
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uint32_t dir;
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/* pin level register for input*/
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uint32_t input;
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/* pin level register for output */
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uint32_t output;
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} reg;
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struct {
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__gpio_mmio_access_t set_bit;
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__gpio_mmio_access_t read;
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__gpio_mmio_access_t write;
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} access;
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};
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#endif /* _GPIO_MMIO_H_ */
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