302 lines
4.7 KiB
Plaintext
302 lines
4.7 KiB
Plaintext
# Kconfig - Quark X1000 SoC configuration options
|
|
|
|
#
|
|
# Copyright (c) 2014-2015 Wind River Systems, Inc.
|
|
# Copyright (c) 2015-2016 Intel Corporation
|
|
#
|
|
# Licensed under the Apache License, Version 2.0 (the "License");
|
|
# you may not use this file except in compliance with the License.
|
|
# You may obtain a copy of the License at
|
|
#
|
|
# http://www.apache.org/licenses/LICENSE-2.0
|
|
#
|
|
# Unless required by applicable law or agreed to in writing, software
|
|
# distributed under the License is distributed on an "AS IS" BASIS,
|
|
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
# See the License for the specific language governing permissions and
|
|
# limitations under the License.
|
|
#
|
|
|
|
if SOC_QUARK_X1000
|
|
|
|
config SOC
|
|
default quark_x1000
|
|
|
|
config PHYS_LOAD_ADDR
|
|
default 0x00100000
|
|
|
|
config PHYS_RAM_ADDR
|
|
default 0x00400000
|
|
|
|
config RAM_SIZE
|
|
default 32768
|
|
|
|
config ROM_SIZE
|
|
default 1024 if XIP
|
|
|
|
config SYS_CLOCK_HW_CYCLES_PER_SEC
|
|
default 25000000 if HPET_TIMER
|
|
|
|
config CLFLUSH_DETECT
|
|
def_bool y if CACHE_FLUSHING
|
|
|
|
if SHARED_IRQ
|
|
|
|
config SHARED_IRQ_0
|
|
def_bool y
|
|
|
|
if SHARED_IRQ_0
|
|
|
|
config SHARED_IRQ_0_NAME
|
|
default "SHARED_IRQ0"
|
|
config SHARED_IRQ_0_IRQ
|
|
default 18
|
|
config SHARED_IRQ_0_PRI
|
|
default 2
|
|
|
|
endif # SHARED_IRQ_0
|
|
|
|
endif # SHARED_IRQ
|
|
|
|
if PCI_LEGACY_BRIDGE
|
|
|
|
config PCI_LEGACY_BRIDGE_BUS
|
|
default 0
|
|
config PCI_LEGACY_BRIDGE_DEV
|
|
default 31
|
|
config PCI_LEGACY_BRIDGE_VENDOR_ID
|
|
default 0x8086
|
|
config PCI_LEGACY_BRIDGE_DEVICE_ID
|
|
default 0x095e
|
|
|
|
endif # PCI_LEGACY_BRIDGE
|
|
|
|
if I2C
|
|
|
|
config I2C_CLOCK_SPEED
|
|
default 25
|
|
|
|
config I2C_DW
|
|
def_bool y
|
|
|
|
if I2C_DW
|
|
|
|
config I2C_DW_0
|
|
def_bool y
|
|
|
|
if I2C_DW_0
|
|
|
|
config I2C_DW_0_NAME
|
|
default "I2C0"
|
|
config I2C_DW_0_DEFAULT_CFG
|
|
default 0x12
|
|
config I2C_DW_0_IRQ_PRI
|
|
default 2
|
|
config I2C_DW_0_IRQ_SHARED_NAME
|
|
default SHARED_IRQ_0_NAME if SHARED_IRQ
|
|
|
|
endif # I2C_DW_0
|
|
|
|
endif # I2C_DW
|
|
|
|
endif # I2C
|
|
|
|
|
|
if GPIO
|
|
|
|
config GPIO_SCH
|
|
def_bool y
|
|
|
|
if GPIO_SCH
|
|
|
|
config GPIO_SCH_0
|
|
def_bool y
|
|
|
|
config GPIO_SCH_1
|
|
def_bool y
|
|
|
|
if GPIO_SCH_0
|
|
|
|
config GPIO_SCH_0_DEV_NAME
|
|
default "GPIO_CW"
|
|
|
|
endif # GPIO_SCH_0
|
|
|
|
if GPIO_SCH_1
|
|
|
|
config GPIO_SCH_1_DEV_NAME
|
|
default "GPIO_RW"
|
|
|
|
endif # GPIO_SCH_1
|
|
|
|
endif # GPIO_SCH
|
|
|
|
config GPIO_DW
|
|
def_bool y
|
|
|
|
if GPIO_DW
|
|
|
|
config GPIO_DW_0
|
|
def_bool y
|
|
select GPIO_DW_0_IRQ_SHARED if SHARED_IRQ
|
|
|
|
if GPIO_DW_0
|
|
|
|
config GPIO_DW_0_NAME
|
|
default "GPIO_0"
|
|
config GPIO_DW_0_PRI
|
|
default 2
|
|
config GPIO_DW_0_IRQ_SHARED_NAME
|
|
default SHARED_IRQ_0_NAME if SHARED_IRQ
|
|
|
|
endif # GPIO_DW_0
|
|
|
|
endif # GPIO_DW
|
|
|
|
endif # GPIO
|
|
|
|
|
|
if SPI
|
|
|
|
config SPI_INTEL
|
|
def_bool y
|
|
|
|
if SPI_INTEL
|
|
|
|
config SPI_INTEL_CS_GPIO
|
|
def_bool y
|
|
|
|
config SPI_INTEL_PORT_0
|
|
def_bool y
|
|
|
|
if SPI_INTEL_PORT_0
|
|
|
|
config SPI_INTEL_PORT_0_DRV_NAME
|
|
default "SPI0"
|
|
config SPI_INTEL_PORT_0_BUS
|
|
default 0
|
|
config SPI_INTEL_PORT_0_DEV
|
|
default 21
|
|
config SPI_INTEL_PORT_0_FUNCTION
|
|
default 0
|
|
config SPI_INTEL_PORT_0_REGS
|
|
default 0x90009000
|
|
config SPI_INTEL_PORT_0_IRQ
|
|
default 16
|
|
config SPI_INTEL_PORT_0_PRI
|
|
default 2
|
|
config SPI_INTEL_PORT_0_CS_GPIO_PORT
|
|
default GPIO_DW_0_NAME
|
|
config SPI_INTEL_PORT_0_CS_GPIO_PIN
|
|
default 0
|
|
|
|
endif # SPI_INTEL_PORT_0
|
|
|
|
config SPI_INTEL_PORT_1
|
|
def_bool n
|
|
|
|
if SPI_INTEL_PORT_1
|
|
|
|
config SPI_INTEL_PORT_1_DRV_NAME
|
|
default "SPI1"
|
|
config SPI_INTEL_PORT_1_BUS
|
|
default 0
|
|
config SPI_INTEL_PORT_1_DEV
|
|
default 21
|
|
config SPI_INTEL_PORT_1_FUNCTION
|
|
default 1
|
|
config SPI_INTEL_PORT_1_REGS
|
|
default 0x90008000
|
|
config SPI_INTEL_PORT_1_IRQ
|
|
default 17
|
|
config SPI_INTEL_PORT_1_PRI
|
|
default 2
|
|
config SPI_INTEL_PORT_1_CS_GPIO_PORT
|
|
default GPIO_DW_0_NAME
|
|
config SPI_INTEL_PORT_1_CS_GPIO_PIN
|
|
default 2
|
|
|
|
endif # SPI_INTEL_PORT_1
|
|
|
|
endif # SPI_INTEL
|
|
|
|
endif # SPI
|
|
|
|
if UART_NS16550
|
|
|
|
config UART_NS16550_PCI
|
|
def_bool y if PCI
|
|
|
|
config UART_NS16550_PORT_0
|
|
def_bool y
|
|
|
|
if UART_NS16550_PORT_0
|
|
|
|
config UART_NS16550_PORT_0_NAME
|
|
default "UART_0"
|
|
config UART_NS16550_PORT_0_IRQ_PRI
|
|
default 0
|
|
config UART_NS16550_PORT_0_BAUD_RATE
|
|
default 115200
|
|
config UART_NS16550_PORT_0_OPTIONS
|
|
default 0
|
|
config UART_NS16550_PORT_0_PCI
|
|
def_bool y if UART_NS16550_PCI
|
|
|
|
endif # UART_NS16550_PORT_0
|
|
|
|
config UART_NS16550_PORT_1
|
|
def_bool y if PCI
|
|
|
|
if UART_NS16550_PORT_1
|
|
|
|
config UART_NS16550_PORT_1_NAME
|
|
default "UART_1"
|
|
config UART_NS16550_PORT_1_IRQ_PRI
|
|
default 3
|
|
config UART_NS16550_PORT_1_BAUD_RATE
|
|
default 115200
|
|
config UART_NS16550_PORT_1_OPTIONS
|
|
default 0
|
|
config UART_NS16550_PORT_1_PCI
|
|
def_bool y if UART_NS16550_PCI
|
|
|
|
endif # UART_NS16550_PORT_1
|
|
|
|
endif # UART_NS16550
|
|
|
|
|
|
if ETH_DW
|
|
|
|
config ETH_DW_0
|
|
def_bool y
|
|
|
|
if ETH_DW_0
|
|
|
|
config ETH_DW_0_IRQ_SHARED_NAME
|
|
default SHARED_IRQ_0_NAME if SHARED_IRQ
|
|
|
|
endif # ETH_DW_0
|
|
|
|
endif # ETH_DW
|
|
|
|
# Pin multiplexer uses PCAL9535A, needs to be initialized after it
|
|
config PINMUX_INIT_PRIORITY
|
|
default 80 if PINMUX
|
|
|
|
if UART_CONSOLE
|
|
|
|
config UART_CONSOLE_ON_DEV_NAME
|
|
default "UART_1"
|
|
|
|
endif
|
|
|
|
if BLUETOOTH_UART
|
|
|
|
config BLUETOOTH_UART_ON_DEV_NAME
|
|
default "UART_1"
|
|
|
|
endif
|
|
|
|
endif # SOC_QUARK_X1000
|