460 lines
14 KiB
C
460 lines
14 KiB
C
/*
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* Copyright (c) 2024 Ambiq Micro Inc. <www.ambiq.com>
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* SPDX-License-Identifier: Apache-2.0
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* Emulate a memory device on MSPI emulator bus
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*/
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#define DT_DRV_COMPAT zephyr_mspi_emul_flash
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#include <zephyr/logging/log.h>
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#include <zephyr/kernel.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/emul.h>
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#include <zephyr/drivers/mspi.h>
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#include <zephyr/drivers/mspi_emul.h>
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#include <zephyr/drivers/flash.h>
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#include "spi_nor.h"
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LOG_MODULE_REGISTER(zephyr_mspi_emul_flash, CONFIG_FLASH_LOG_LEVEL);
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/* add else if for other SoC platforms */
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#if defined(CONFIG_SOC_POSIX)
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typedef struct mspi_timing_cfg mspi_timing_cfg;
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typedef enum mspi_timing_param mspi_timing_param;
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#endif
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struct flash_mspi_emul_device_config {
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uint32_t size;
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struct flash_parameters flash_param;
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struct flash_pages_layout page_layout;
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struct mspi_dev_id dev_id;
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struct mspi_dev_cfg tar_dev_cfg;
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struct mspi_xip_cfg tar_xip_cfg;
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struct mspi_scramble_cfg tar_scramble_cfg;
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bool sw_multi_periph;
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};
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struct flash_mspi_emul_device_data {
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const struct device *bus;
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struct mspi_dev_cfg dev_cfg;
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struct mspi_xip_cfg xip_cfg;
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struct mspi_scramble_cfg scramble_cfg;
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mspi_timing_cfg timing_cfg;
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struct mspi_xfer xfer;
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struct mspi_xfer_packet packet;
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struct k_sem lock;
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uint8_t *mem;
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};
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/**
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* Acquire the device lock.
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*
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* @param flash MSPI emulation flash device.
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*/
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static void acquire(const struct device *flash)
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{
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const struct flash_mspi_emul_device_config *cfg = flash->config;
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struct flash_mspi_emul_device_data *data = flash->data;
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k_sem_take(&data->lock, K_FOREVER);
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if (cfg->sw_multi_periph) {
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while (mspi_dev_config(data->bus, &cfg->dev_id,
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MSPI_DEVICE_CONFIG_ALL, &data->dev_cfg)) {
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;
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}
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} else {
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while (mspi_dev_config(data->bus, &cfg->dev_id,
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MSPI_DEVICE_CONFIG_NONE, NULL)) {
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;
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}
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}
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}
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/**
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* Release the device lock.
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*
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* @param flash MSPI emulation flash device.
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*/
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static void release(const struct device *flash)
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{
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struct flash_mspi_emul_device_data *data = flash->data;
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while (mspi_get_channel_status(data->bus, 0)) {
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}
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k_sem_give(&data->lock);
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}
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/**
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* API implementation of emul_mspi_dev_api_transceive transceive.
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*
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* @param target Pointer to MSPI device emulator.
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* @param dev_id Pointer to the device ID structure from a device.
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* @param xfer Pointer to the MSPI transfer started by dev_id.
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*
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* @retval 0 if successful.
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* @retval -ESTALE device ID don't match, need to call mspi_dev_config first.
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* @retval -Error transfer failed.
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*/
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static int emul_mspi_device_transceive(const struct emul *target,
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const struct mspi_xfer_packet *packets,
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uint32_t num_packet,
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bool async,
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uint32_t timeout)
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{
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ARG_UNUSED(timeout);
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const struct flash_mspi_emul_device_config *cfg = target->dev->config;
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struct flash_mspi_emul_device_data *data = target->dev->data;
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struct emul_mspi_driver_api *api = (struct emul_mspi_driver_api *)data->bus->api;
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__ASSERT_NO_MSG(api);
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__ASSERT_NO_MSG(api->trigger_event);
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for (uint32_t count = 0; count < num_packet; ++count) {
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const struct mspi_xfer_packet *packet = &packets[count];
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if (packet->address > cfg->size ||
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packet->address + packet->num_bytes > cfg->size) {
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return -ENOMEM;
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}
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if (packet->dir == MSPI_RX) {
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memcpy(packet->data_buf, data->mem + packet->address,
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packet->num_bytes);
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} else if (packet->dir == MSPI_TX) {
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memcpy(data->mem + packet->address, packet->data_buf,
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packet->num_bytes);
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}
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if (async) {
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if (packet->cb_mask == MSPI_BUS_XFER_COMPLETE_CB) {
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api->trigger_event(data->bus, MSPI_BUS_XFER_COMPLETE);
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}
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}
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}
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return 0;
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}
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static int flash_mspi_emul_erase(const struct device *flash, off_t offset, size_t size)
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{
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const struct flash_mspi_emul_device_config *cfg = flash->config;
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struct flash_mspi_emul_device_data *data = flash->data;
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const size_t num_sectors = size / SPI_NOR_SECTOR_SIZE;
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const size_t num_blocks = size / SPI_NOR_BLOCK_SIZE;
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int i;
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acquire(flash);
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if (offset % SPI_NOR_SECTOR_SIZE) {
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LOG_ERR("Invalid offset");
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return -EINVAL;
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}
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if (size % SPI_NOR_SECTOR_SIZE) {
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LOG_ERR("Invalid size");
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return -EINVAL;
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}
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if ((offset == 0) && (size == cfg->size)) {
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memset(data->mem, cfg->flash_param.erase_value, size);
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} else if ((0 == (offset % SPI_NOR_BLOCK_SIZE)) && (0 == (size % SPI_NOR_BLOCK_SIZE))) {
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for (i = 0; i < num_blocks; i++) {
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memset(data->mem + offset, cfg->flash_param.erase_value,
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SPI_NOR_BLOCK_SIZE);
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offset += SPI_NOR_BLOCK_SIZE;
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}
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} else {
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for (i = 0; i < num_sectors; i++) {
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memset(data->mem + offset, cfg->flash_param.erase_value,
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SPI_NOR_SECTOR_SIZE);
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offset += SPI_NOR_SECTOR_SIZE;
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}
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}
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release(flash);
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return 0;
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}
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/**
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* API implementation of flash write.
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*
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* @param flash Pointer to MSPI flash device.
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* @param offset Flash device address.
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* @param wdata Pointer to the write data buffer.
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* @param len Number of bytes to write.
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*
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* @retval 0 if successful.
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* @retval -Error flash read fail.
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*/
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static int flash_mspi_emul_write(const struct device *flash, off_t offset,
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const void *wdata, size_t len)
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{
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const struct flash_mspi_emul_device_config *cfg = flash->config;
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struct flash_mspi_emul_device_data *data = flash->data;
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int ret;
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uint8_t *src = (uint8_t *)wdata;
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int i;
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acquire(flash);
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data->xfer.async = false;
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data->xfer.xfer_mode = MSPI_DMA;
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data->xfer.tx_dummy = data->dev_cfg.tx_dummy;
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data->xfer.cmd_length = data->dev_cfg.cmd_length;
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data->xfer.addr_length = data->dev_cfg.addr_length;
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data->xfer.hold_ce = false;
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data->xfer.priority = 1;
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data->xfer.packets = &data->packet;
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data->xfer.num_packet = 1;
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data->xfer.timeout = CONFIG_MSPI_COMPLETION_TIMEOUT_TOLERANCE;
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while (len) {
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/* If the offset isn't a multiple of the NOR page size, we first need
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* to write the remaining part that fits, otherwise the write could
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* be wrapped around within the same page
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*/
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i = MIN(SPI_NOR_PAGE_SIZE - (offset % SPI_NOR_PAGE_SIZE), len);
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data->packet.dir = MSPI_TX;
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data->packet.cmd = data->dev_cfg.write_cmd;
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data->packet.address = offset;
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data->packet.data_buf = src;
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data->packet.num_bytes = i;
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LOG_DBG("Write %d bytes to 0x%08zx", i, (ssize_t)offset);
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ret = mspi_transceive(data->bus, &cfg->dev_id,
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(const struct mspi_xfer *)&data->xfer);
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if (ret) {
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LOG_ERR("%u, MSPI write transaction failed with code: %d", __LINE__, ret);
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return -EIO;
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}
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/* emulate flash write busy wait */
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k_busy_wait(100);
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src += i;
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offset += i;
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len -= i;
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}
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release(flash);
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return ret;
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}
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/**
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* API implementation of flash read.
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*
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* @param flash Pointer to MSPI flash device.
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* @param offset Flash device address.
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* @param rdata Pointer to the read data buffer.
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* @param len Number of bytes to read.
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*
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* @retval 0 if successful.
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* @retval -Error flash read fail.
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*/
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static int flash_mspi_emul_read(const struct device *flash, off_t offset,
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void *rdata, size_t len)
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{
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const struct flash_mspi_emul_device_config *cfg = flash->config;
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struct flash_mspi_emul_device_data *data = flash->data;
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int ret;
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acquire(flash);
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data->packet.dir = MSPI_RX;
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data->packet.cmd = data->dev_cfg.read_cmd;
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data->packet.address = offset;
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data->packet.data_buf = rdata;
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data->packet.num_bytes = len;
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data->xfer.async = false;
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data->xfer.xfer_mode = MSPI_DMA;
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data->xfer.rx_dummy = data->dev_cfg.rx_dummy;
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data->xfer.cmd_length = data->dev_cfg.cmd_length;
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data->xfer.addr_length = data->dev_cfg.addr_length;
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data->xfer.hold_ce = false;
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data->xfer.priority = 1;
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data->xfer.packets = &data->packet;
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data->xfer.num_packet = 1;
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data->xfer.timeout = CONFIG_MSPI_COMPLETION_TIMEOUT_TOLERANCE;
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LOG_DBG("Read %d bytes from 0x%08zx", len, (ssize_t)offset);
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ret = mspi_transceive(data->bus, &cfg->dev_id, (const struct mspi_xfer *)&data->xfer);
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if (ret) {
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LOG_ERR("%u, MSPI read transaction failed with code: %d", __LINE__, ret);
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return -EIO;
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}
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release(flash);
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return ret;
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}
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/**
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* API implementation of flash get_parameters.
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*
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* @param flash Pointer to MSPI flash device.
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*
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* @retval @ref flash_parameters.
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*/
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static const struct flash_parameters *flash_mspi_emul_get_parameters(const struct device *flash)
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{
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const struct flash_mspi_emul_device_config *cfg = flash->config;
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return &cfg->flash_param;
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}
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#if defined(CONFIG_FLASH_PAGE_LAYOUT)
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/**
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* API implementation of flash pages_layout.
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*
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* @param flash Pointer to MSPI flash device.
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* @param layout @ref flash_pages_layout.
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* @param layout_size
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*/
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static void flash_mspi_emul_pages_layout(const struct device *flash,
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const struct flash_pages_layout **layout,
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size_t *layout_size)
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{
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const struct flash_mspi_emul_device_config *cfg = flash->config;
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*layout = &cfg->page_layout;
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*layout_size = 1;
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}
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#endif /* CONFIG_FLASH_PAGE_LAYOUT */
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static const struct flash_driver_api flash_mspi_emul_device_api = {
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.erase = flash_mspi_emul_erase,
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.write = flash_mspi_emul_write,
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.read = flash_mspi_emul_read,
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.get_parameters = flash_mspi_emul_get_parameters,
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#if defined(CONFIG_FLASH_PAGE_LAYOUT)
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.page_layout = flash_mspi_emul_pages_layout,
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#endif
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};
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static const struct emul_mspi_device_api emul_mspi_dev_api = {
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.transceive = emul_mspi_device_transceive,
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};
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/**
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* Set up a new MSPI device emulator
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*
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* @param emul The MSPI device emulator instance itself
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* @param bus The MSPI bus emulator instance
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* @return 0 If successful
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*/
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static int emul_mspi_device_init(const struct emul *emul_flash, const struct device *bus)
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{
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const struct flash_mspi_emul_device_config *cfg = emul_flash->dev->config;
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struct flash_mspi_emul_device_data *data = emul_flash->dev->data;
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data->bus = bus;
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if (mspi_dev_config(data->bus, &cfg->dev_id, MSPI_DEVICE_CONFIG_ALL,
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&cfg->tar_dev_cfg)) {
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LOG_ERR("%u, Failed to config mspi controller", __LINE__);
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return -EIO;
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}
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data->dev_cfg = cfg->tar_dev_cfg;
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#if CONFIG_MSPI_XIP
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if (cfg->tar_xip_cfg.enable) {
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if (mspi_xip_config(data->bus, &cfg->dev_id, &cfg->tar_xip_cfg)) {
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LOG_ERR("%u, Failed to enable XIP.", __LINE__);
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return -EIO;
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}
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data->xip_cfg = cfg->tar_xip_cfg;
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}
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#endif
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#if CONFIG_MSPI_SCRAMBLE
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if (cfg->tar_scramble_cfg.enable) {
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if (mspi_scramble_config(data->bus, &cfg->dev_id, &cfg->tar_scramble_cfg)) {
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LOG_ERR("%u, Failed to enable scrambling.", __LINE__);
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return -EIO;
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}
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data->scramble_cfg = cfg->tar_scramble_cfg;
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}
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#endif
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#if CONFIG_MSPI_TIMING
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if (mspi_timing_config(data->bus, &cfg->dev_id,
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MSPI_TIMING_PARAM_DUMMY, &data->timing_cfg)) {
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LOG_ERR("%u, Failed to configure timing.", __LINE__);
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return -EIO;
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}
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#endif
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release(emul_flash->dev);
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return 0;
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}
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static int flash_mspi_emul_device_init_stub(const struct device *dev)
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{
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ARG_UNUSED(dev);
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return 0;
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}
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#define FLASH_MSPI_EMUL_DEVICE(n) \
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static uint8_t flash_mspi_emul_device_mem##n[DT_INST_PROP(n, size) / 8]; \
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static const struct flash_mspi_emul_device_config flash_mspi_emul_device_config_##n = { \
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.size = DT_INST_PROP(n, size) / 8, \
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.flash_param = \
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{ \
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.write_block_size = 1, \
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.erase_value = 0xff, \
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}, \
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.page_layout = \
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{ \
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.pages_count = DT_INST_PROP(n, size) / 8 / SPI_NOR_PAGE_SIZE,\
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.pages_size = SPI_NOR_PAGE_SIZE, \
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}, \
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.dev_id = MSPI_DEVICE_ID_DT_INST(n), \
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.tar_dev_cfg = MSPI_DEVICE_CONFIG_DT_INST(n), \
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.tar_xip_cfg = MSPI_XIP_CONFIG_DT_INST(n), \
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.tar_scramble_cfg = MSPI_SCRAMBLE_CONFIG_DT_INST(n), \
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.sw_multi_periph = DT_PROP(DT_INST_BUS(n), software_multiperipheral) \
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}; \
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static struct flash_mspi_emul_device_data flash_mspi_emul_device_data_##n = { \
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.lock = Z_SEM_INITIALIZER(flash_mspi_emul_device_data_##n.lock, 0, 1), \
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.mem = (uint8_t *)flash_mspi_emul_device_mem##n, \
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}; \
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DEVICE_DT_INST_DEFINE(n, \
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flash_mspi_emul_device_init_stub, \
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NULL, \
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&flash_mspi_emul_device_data_##n, \
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&flash_mspi_emul_device_config_##n, \
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POST_KERNEL, \
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CONFIG_FLASH_INIT_PRIORITY, \
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&flash_mspi_emul_device_api);
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#define EMUL_TEST(n) \
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EMUL_DT_INST_DEFINE(n, \
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emul_mspi_device_init, \
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NULL, \
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NULL, \
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&emul_mspi_dev_api, \
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NULL);
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DT_INST_FOREACH_STATUS_OKAY(EMUL_TEST);
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DT_INST_FOREACH_STATUS_OKAY(FLASH_MSPI_EMUL_DEVICE);
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