149 lines
5.0 KiB
C
149 lines
5.0 KiB
C
/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nordic_nrf_auxpll
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#include <errno.h>
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#include <stdint.h>
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#include <zephyr/arch/cpu.h>
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#include <zephyr/device.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/kernel.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/toolchain.h>
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#include <hal/nrf_auxpll.h>
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/* maximum lock time in ms, >10x time observed experimentally */
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#define AUXPLL_LOCK_TIME_MAX_MS 20
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/* lock wait step in ms*/
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#define AUXPLL_LOCK_WAIT_STEP_MS 1
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struct clock_control_nrf_auxpll_config {
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NRF_AUXPLL_Type *auxpll;
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uint32_t ref_clk_hz;
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uint32_t ficr_ctune;
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nrf_auxpll_config_t cfg;
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uint16_t frequency;
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nrf_auxpll_ctrl_outsel_t out_div;
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};
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static int clock_control_nrf_auxpll_on(const struct device *dev, clock_control_subsys_t sys)
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{
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const struct clock_control_nrf_auxpll_config *config = dev->config;
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bool locked;
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unsigned int wait = 0U;
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ARG_UNUSED(sys);
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nrf_auxpll_task_trigger(config->auxpll, NRF_AUXPLL_TASK_START);
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do {
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locked = nrf_auxpll_mode_locked_check(config->auxpll);
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if (!locked) {
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k_msleep(AUXPLL_LOCK_WAIT_STEP_MS);
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wait += AUXPLL_LOCK_WAIT_STEP_MS;
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}
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} while (wait < AUXPLL_LOCK_TIME_MAX_MS && !locked);
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return locked ? 0 : -ETIMEDOUT;
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}
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static int clock_control_nrf_auxpll_off(const struct device *dev, clock_control_subsys_t sys)
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{
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const struct clock_control_nrf_auxpll_config *config = dev->config;
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ARG_UNUSED(sys);
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nrf_auxpll_task_trigger(config->auxpll, NRF_AUXPLL_TASK_STOP);
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while (nrf_auxpll_running_check(config->auxpll)) {
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}
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return 0;
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}
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static int clock_control_nrf_auxpll_get_rate(const struct device *dev, clock_control_subsys_t sys,
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uint32_t *rate)
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{
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const struct clock_control_nrf_auxpll_config *config = dev->config;
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uint8_t ratio;
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ARG_UNUSED(sys);
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ratio = nrf_auxpll_static_ratio_get(config->auxpll);
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*rate = (ratio * config->ref_clk_hz +
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(config->ref_clk_hz * (uint64_t)config->frequency) /
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(AUXPLL_AUXPLLCTRL_FREQUENCY_FREQUENCY_MaximumDiv + 1U)) /
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config->out_div;
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return 0;
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}
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static enum clock_control_status clock_control_nrf_auxpll_get_status(const struct device *dev,
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clock_control_subsys_t sys)
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{
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const struct clock_control_nrf_auxpll_config *config = dev->config;
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ARG_UNUSED(sys);
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if (nrf_auxpll_mode_locked_check(config->auxpll)) {
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return CLOCK_CONTROL_STATUS_ON;
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}
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return CLOCK_CONTROL_STATUS_OFF;
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}
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static const struct clock_control_driver_api clock_control_nrf_auxpll_api = {
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.on = clock_control_nrf_auxpll_on,
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.off = clock_control_nrf_auxpll_off,
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.get_rate = clock_control_nrf_auxpll_get_rate,
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.get_status = clock_control_nrf_auxpll_get_status,
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};
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static int clock_control_nrf_auxpll_init(const struct device *dev)
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{
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const struct clock_control_nrf_auxpll_config *config = dev->config;
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nrf_auxpll_ctrl_frequency_set(config->auxpll, config->frequency);
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nrf_auxpll_lock(config->auxpll);
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nrf_auxpll_trim_ctune_set(config->auxpll, sys_read8(config->ficr_ctune));
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nrf_auxpll_config_set(config->auxpll, &config->cfg);
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nrf_auxpll_ctrl_outsel_set(config->auxpll, config->out_div);
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nrf_auxpll_unlock(config->auxpll);
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nrf_auxpll_ctrl_mode_set(config->auxpll, NRF_AUXPLL_CTRL_MODE_LOCKED);
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return 0;
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}
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#define CLOCK_CONTROL_NRF_AUXPLL_DEFINE(n) \
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static const struct clock_control_nrf_auxpll_config config##n = { \
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.auxpll = (NRF_AUXPLL_Type *)DT_INST_REG_ADDR(n), \
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.ref_clk_hz = DT_PROP(DT_INST_CLOCKS_CTLR(n), clock_frequency), \
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.ficr_ctune = DT_REG_ADDR(DT_INST_PHANDLE(n, nordic_ficrs)) + \
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DT_INST_PHA(n, nordic_ficrs, offset), \
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.cfg = \
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{ \
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.outdrive = DT_INST_PROP(n, nordic_out_drive), \
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.current_tune = DT_INST_PROP(n, nordic_current_tune), \
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.sdm_off = DT_INST_PROP(n, nordic_sdm_disable), \
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.dither_off = DT_INST_PROP(n, nordic_dither_disable), \
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.range = DT_INST_ENUM_IDX(n, nordic_range), \
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}, \
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.frequency = DT_INST_PROP(n, nordic_frequency), \
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.out_div = DT_INST_PROP(n, nordic_out_div), \
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}; \
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\
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DEVICE_DT_INST_DEFINE(n, clock_control_nrf_auxpll_init, NULL, NULL, &config##n, \
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PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, \
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&clock_control_nrf_auxpll_api);
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DT_INST_FOREACH_STATUS_OKAY(CLOCK_CONTROL_NRF_AUXPLL_DEFINE)
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