zephyr/arch/arm
Carles Cufi b6109496ff arm: Cortex-M0: Adapt core register code to M0
The Cortex-M0(+) and in general processors that support only the ARMv6-M
instruction set have a reduced set of registers and fields compared to
the ARMv7-M compliant processors.
This change goes through all core registers and disables or removes
everything that is not part of the ARMv6-M architecture when compiling
for Cortex-M0.

Jira: ZEP-1497

Change-id: I13e2637bb730e69d02f2a5ee687038dc69ad28a8
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-03 22:44:35 +00:00
..
core arm: Cortex-M0: Adapt core register code to M0 2017-01-03 22:44:35 +00:00
include arm: Cortex-M0: Adapt core register code to M0 2017-01-03 22:44:35 +00:00
soc kernel: replace all remaining nanokernel occurances 2016-12-25 14:34:43 -05:00
Kbuild soc: arm: add Makefiles one level up 2016-04-22 21:33:26 +00:00
Kconfig doc: Fix terminology in Kconfig files for 'platform' 2016-08-18 21:17:29 +00:00
Makefile arch: Add support for Cortex-M7 processor 2016-10-26 12:58:40 -05:00
defconfig arm: systick: Some SoCs do not have systick 2016-11-27 19:39:26 +00:00