134 lines
3.8 KiB
C
134 lines
3.8 KiB
C
/*
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* Copyright (c) 2021 Vestas Wind Systems A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/devicetree.h>
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#if DT_HAS_COMPAT_STATUS_OKAY(nxp_kinetis_lptmr)
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#define DT_DRV_COMPAT nxp_kinetis_lptmr
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#else
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#define DT_DRV_COMPAT nxp_lptmr
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#endif
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#include <zephyr/init.h>
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#include <zephyr/drivers/timer/system_timer.h>
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#include <zephyr/kernel.h>
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#include <zephyr/sys/time_units.h>
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#include <fsl_lptmr.h>
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#include <zephyr/irq.h>
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BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
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"No LPTMR instance enabled in devicetree");
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/* Prescaler mapping */
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#define LPTMR_PRESCALER_2 kLPTMR_Prescale_Glitch_0
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#define LPTMR_PRESCALER_4 kLPTMR_Prescale_Glitch_1
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#define LPTMR_PRESCALER_8 kLPTMR_Prescale_Glitch_2
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#define LPTMR_PRESCALER_16 kLPTMR_Prescale_Glitch_3
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#define LPTMR_PRESCALER_32 kLPTMR_Prescale_Glitch_4
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#define LPTMR_PRESCALER_64 kLPTMR_Prescale_Glitch_5
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#define LPTMR_PRESCALER_128 kLPTMR_Prescale_Glitch_6
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#define LPTMR_PRESCALER_256 kLPTMR_Prescale_Glitch_7
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#define LPTMR_PRESCALER_512 kLPTMR_Prescale_Glitch_8
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#define LPTMR_PRESCALER_1024 kLPTMR_Prescale_Glitch_9
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#define LPTMR_PRESCALER_2048 kLPTMR_Prescale_Glitch_10
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#define LPTMR_PRESCALER_4096 kLPTMR_Prescale_Glitch_11
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#define LPTMR_PRESCALER_8192 kLPTMR_Prescale_Glitch_12
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#define LPTMR_PRESCALER_16384 kLPTMR_Prescale_Glitch_13
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#define LPTMR_PRESCALER_32768 kLPTMR_Prescale_Glitch_14
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#define LPTMR_PRESCALER_65536 kLPTMR_Prescale_Glitch_15
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#define TO_LPTMR_PRESCALER(val) _DO_CONCAT(LPTMR_PRESCALER_, val)
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/* Prescaler clock mapping */
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#define TO_LPTMR_CLK_SEL(val) _DO_CONCAT(kLPTMR_PrescalerClock_, val)
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/* Devicetree properties */
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#define LPTMR_BASE ((LPTMR_Type *)(DT_INST_REG_ADDR(0)))
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#define LPTMR_CLK_SOURCE TO_LPTMR_CLK_SEL(DT_INST_PROP(0, clk_source));
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#define LPTMR_PRESCALER TO_LPTMR_PRESCALER(DT_INST_PROP(0, prescaler));
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#define LPTMR_BYPASS_PRESCALER DT_INST_PROP(0, prescaler) == 1
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#define LPTMR_IRQN DT_INST_IRQN(0)
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#define LPTMR_IRQ_PRIORITY DT_INST_IRQ(0, priority)
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/* Timer cycles per tick */
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#define CYCLES_PER_TICK ((uint32_t)((uint64_t)sys_clock_hw_cycles_per_sec() \
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/ (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC))
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/* 32 bit cycle counter */
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static volatile uint32_t cycles;
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void sys_clock_set_timeout(int32_t ticks, bool idle)
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{
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ARG_UNUSED(idle);
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if (idle && (ticks == K_TICKS_FOREVER)) {
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LPTMR_DisableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
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}
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}
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void sys_clock_idle_exit(void)
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{
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if (LPTMR_GetEnabledInterrupts(LPTMR_BASE) != kLPTMR_TimerInterruptEnable) {
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LPTMR_EnableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
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}
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}
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void sys_clock_disable(void)
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{
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LPTMR_DisableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
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LPTMR_StopTimer(LPTMR_BASE);
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}
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uint32_t sys_clock_elapsed(void)
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{
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return 0;
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}
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uint32_t sys_clock_cycle_get_32(void)
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{
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return LPTMR_GetCurrentTimerCount(LPTMR_BASE) + cycles;
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}
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static void mcux_lptmr_timer_isr(const void *arg)
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{
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ARG_UNUSED(arg);
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cycles += CYCLES_PER_TICK;
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sys_clock_announce(1);
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LPTMR_ClearStatusFlags(LPTMR_BASE, kLPTMR_TimerCompareFlag);
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}
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static int sys_clock_driver_init(void)
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{
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lptmr_config_t config;
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LPTMR_GetDefaultConfig(&config);
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config.timerMode = kLPTMR_TimerModeTimeCounter;
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config.enableFreeRunning = false;
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config.prescalerClockSource = LPTMR_CLK_SOURCE;
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#if LPTMR_BYPASS_PRESCALER
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config.bypassPrescaler = true;
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#else /* LPTMR_BYPASS_PRESCALER */
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config.bypassPrescaler = false;
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config.value = LPTMR_PRESCALER;
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#endif /* !LPTMR_BYPASS_PRESCALER */
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LPTMR_Init(LPTMR_BASE, &config);
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IRQ_CONNECT(LPTMR_IRQN, LPTMR_IRQ_PRIORITY, mcux_lptmr_timer_isr, NULL, 0);
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irq_enable(LPTMR_IRQN);
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LPTMR_EnableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
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LPTMR_SetTimerPeriod(LPTMR_BASE, CYCLES_PER_TICK);
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LPTMR_StartTimer(LPTMR_BASE);
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return 0;
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}
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SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2,
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CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
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