79 lines
1.9 KiB
C
79 lines
1.9 KiB
C
/*
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* Copyright (c) 2022 Google Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT st_stm32_rcc_rctl
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#include <zephyr/arch/cpu.h>
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#include <zephyr/device.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/drivers/reset.h>
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#define STM32_RESET_CLR_OFFSET(id) (((id) >> 17U) & 0xFFFU)
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#define STM32_RESET_SET_OFFSET(id) (((id) >> 5U) & 0xFFFU)
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#define STM32_RESET_REG_BIT(id) ((id)&0x1FU)
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struct reset_stm32_config {
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uintptr_t base;
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};
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static int reset_stm32_status(const struct device *dev, uint32_t id,
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uint8_t *status)
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{
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const struct reset_stm32_config *config = dev->config;
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*status = !!sys_test_bit(config->base + STM32_RESET_SET_OFFSET(id),
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STM32_RESET_REG_BIT(id));
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return 0;
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}
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static int reset_stm32_line_assert(const struct device *dev, uint32_t id)
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{
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const struct reset_stm32_config *config = dev->config;
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sys_set_bit(config->base + STM32_RESET_SET_OFFSET(id),
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STM32_RESET_REG_BIT(id));
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return 0;
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}
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static int reset_stm32_line_deassert(const struct device *dev, uint32_t id)
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{
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const struct reset_stm32_config *config = dev->config;
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#if DT_INST_PROP(0, set_bit_to_deassert)
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sys_set_bit(config->base + STM32_RESET_CLR_OFFSET(id),
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STM32_RESET_REG_BIT(id));
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#else
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sys_clear_bit(config->base + STM32_RESET_SET_OFFSET(id),
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STM32_RESET_REG_BIT(id));
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#endif
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return 0;
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}
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static int reset_stm32_line_toggle(const struct device *dev, uint32_t id)
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{
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reset_stm32_line_assert(dev, id);
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reset_stm32_line_deassert(dev, id);
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return 0;
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}
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static const struct reset_driver_api reset_stm32_driver_api = {
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.status = reset_stm32_status,
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.line_assert = reset_stm32_line_assert,
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.line_deassert = reset_stm32_line_deassert,
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.line_toggle = reset_stm32_line_toggle,
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};
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static const struct reset_stm32_config reset_stm32_config = {
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.base = DT_REG_ADDR(DT_INST_PARENT(0)),
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};
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DEVICE_DT_INST_DEFINE(0, NULL, NULL, NULL, &reset_stm32_config, PRE_KERNEL_1,
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CONFIG_RESET_INIT_PRIORITY, &reset_stm32_driver_api);
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