273 lines
9.6 KiB
C
273 lines
9.6 KiB
C
/*
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* Copyright (c) 2023 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nuvoton_numaker_gpio
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control/clock_control_numaker.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include <zephyr/logging/log.h>
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#include <NuMicro.h>
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#define NU_MFP_POS(pinindex) ((pinindex % 4) * 8)
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LOG_MODULE_REGISTER(gpio_numaker, LOG_LEVEL_ERR);
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struct gpio_numaker_config {
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struct gpio_driver_config common;
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uint32_t reg;
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uint32_t gpa_base;
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uint32_t size;
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uint32_t clk_modidx;
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const struct device *clk_dev;
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};
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struct gpio_numaker_data {
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struct gpio_driver_data common;
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sys_slist_t callbacks;
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};
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static int gpio_numaker_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
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{
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const struct gpio_numaker_config *config = dev->config;
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struct gpio_numaker_data *data = dev->data;
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GPIO_T *gpio_base = (GPIO_T *)config->reg;
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uint32_t pinMfpMask = (0x1f << NU_MFP_POS(pin));
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uint32_t pinMask = BIT(pin); /* mask for pin index --> (0x01 << pin) */
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uint32_t port_index;
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uint32_t *GPx_MFPx;
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uint32_t pinMfpGpio;
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int err = 0;
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ARG_UNUSED(data);
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/* Check for an invalid pin number */
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if (pin > 15) {
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return -EINVAL;
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}
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/* Configure GPIO direction */
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switch (flags & GPIO_DIR_MASK) {
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case GPIO_INPUT:
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GPIO_SetMode(gpio_base, pinMask, GPIO_MODE_INPUT);
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break;
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case GPIO_OUTPUT:
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GPIO_SetMode(gpio_base, pinMask, GPIO_MODE_OUTPUT);
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break;
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case (GPIO_INPUT | GPIO_OUTPUT):
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GPIO_SetMode(gpio_base, pinMask, GPIO_MODE_QUASI);
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break;
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default:
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err = -ENOTSUP;
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goto move_exit;
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}
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if (flags & GPIO_LINE_OPEN_DRAIN) {
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GPIO_SetMode(gpio_base, pinMask, GPIO_MODE_OPEN_DRAIN);
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}
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/* Set Multi-function, default is GPIO */
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port_index = (config->reg - config->gpa_base) / config->size;
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GPx_MFPx = ((uint32_t *)&SYS->GPA_MFP0) + port_index * 4 + (pin / 4);
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pinMfpGpio = 0x00UL;
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/*
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* E.g.: SYS->GPA_MFP0 = (SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk) ) |
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* SYS_GPA_MFP0_PA0MFP_GPIO;
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*/
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*GPx_MFPx = (*GPx_MFPx & (~pinMfpMask)) | pinMfpGpio;
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/* Set pull control as pull-up, pull-down or pull-disable */
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if ((flags & GPIO_PULL_UP) != 0) {
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GPIO_SetPullCtl(gpio_base, pinMask, GPIO_PUSEL_PULL_UP);
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} else if ((flags & GPIO_PULL_DOWN) != 0) {
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GPIO_SetPullCtl(gpio_base, pinMask, GPIO_PUSEL_PULL_DOWN);
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} else {
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GPIO_SetPullCtl(gpio_base, pinMask, GPIO_PUSEL_DISABLE);
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}
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/* Set Init Level 0:low 1:high */
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0) {
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gpio_base->DOUT |= pinMask;
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0) {
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gpio_base->DOUT &= ~pinMask;
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}
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move_exit:
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return err;
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}
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static int gpio_numaker_port_get_raw(const struct device *dev, uint32_t *value)
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{
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const struct gpio_numaker_config *config = dev->config;
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GPIO_T *gpio_base = (GPIO_T *)config->reg;
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/* Get raw bits of GPIO PIN data */
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*value = gpio_base->PIN;
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return 0;
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}
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static int gpio_numaker_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value)
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{
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const struct gpio_numaker_config *config = dev->config;
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GPIO_T *gpio_base = (GPIO_T *)config->reg;
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gpio_base->DOUT = (gpio_base->DOUT & ~mask) | (mask & value);
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return 0;
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}
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static int gpio_numaker_port_set_bits_raw(const struct device *dev, uint32_t mask)
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{
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const struct gpio_numaker_config *config = dev->config;
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GPIO_T *gpio_base = (GPIO_T *)config->reg;
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/* Set raw bits of GPIO output data */
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gpio_base->DOUT |= mask;
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return 0;
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}
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static int gpio_numaker_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t mask)
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{
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const struct gpio_numaker_config *config = dev->config;
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GPIO_T *gpio_base = (GPIO_T *)config->reg;
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/* Clear raw bits of GPIO data */
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gpio_base->DOUT &= ~mask;
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return 0;
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}
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static int gpio_numaker_port_toggle_bits(const struct device *dev, gpio_port_pins_t mask)
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{
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const struct gpio_numaker_config *config = dev->config;
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GPIO_T *gpio_base = (GPIO_T *)config->reg;
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/* Toggle raw bits of GPIO data */
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gpio_base->DOUT ^= mask;
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return 0;
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}
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static int gpio_numaker_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin,
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enum gpio_int_mode mode, enum gpio_int_trig trig)
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{
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const struct gpio_numaker_config *config = dev->config;
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GPIO_T *gpio_base = (GPIO_T *)config->reg;
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uint32_t intAttr;
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if (mode == GPIO_INT_MODE_DISABLED) {
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GPIO_DisableInt(gpio_base, pin);
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/* Clear the port int status */
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gpio_base->INTSRC &= BIT(pin);
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} else {
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switch (trig) {
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case GPIO_INT_TRIG_LOW:
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intAttr = ((mode == GPIO_INT_MODE_EDGE) ? GPIO_INT_FALLING : GPIO_INT_LOW);
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break;
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case GPIO_INT_TRIG_HIGH:
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intAttr = ((mode == GPIO_INT_MODE_EDGE) ? GPIO_INT_RISING : GPIO_INT_HIGH);
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break;
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case GPIO_INT_TRIG_BOTH:
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if (mode != GPIO_INT_MODE_EDGE) {
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return -ENOTSUP;
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}
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intAttr = GPIO_INT_BOTH_EDGE;
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break;
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default:
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return -ENOTSUP;
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}
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GPIO_EnableInt(gpio_base, pin, intAttr);
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}
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return 0;
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}
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static int gpio_numaker_manage_callback(const struct device *dev, struct gpio_callback *callback,
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bool set)
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{
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struct gpio_numaker_data *data = dev->data;
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return gpio_manage_callback(&data->callbacks, callback, set);
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}
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static const struct gpio_driver_api gpio_numaker_api = {
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.pin_configure = gpio_numaker_configure,
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.port_get_raw = gpio_numaker_port_get_raw,
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.port_set_masked_raw = gpio_numaker_port_set_masked_raw,
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.port_set_bits_raw = gpio_numaker_port_set_bits_raw,
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.port_clear_bits_raw = gpio_numaker_port_clear_bits_raw,
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.port_toggle_bits = gpio_numaker_port_toggle_bits,
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.pin_interrupt_configure = gpio_numaker_pin_interrupt_configure,
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.manage_callback = gpio_numaker_manage_callback};
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static void gpio_numaker_isr(const struct device *dev)
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{
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const struct gpio_numaker_config *config = dev->config;
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struct gpio_numaker_data *data = dev->data;
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GPIO_T *gpio_base = (GPIO_T *)config->reg;
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uint32_t int_status;
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/* Get the int status */
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int_status = gpio_base->INTSRC;
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/* Clear the port int status */
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gpio_base->INTSRC = int_status;
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gpio_fire_callbacks(&data->callbacks, dev, int_status);
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}
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#define CLOCK_CTRL_INIT(n) .clk_dev = DEVICE_DT_GET(DT_PARENT(DT_INST_CLOCKS_CTLR(n))),
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#define GPIO_NUMAKER_IRQ_INIT(n) \
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do { \
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IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), gpio_numaker_isr, \
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DEVICE_DT_INST_GET(n), 0); \
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\
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irq_enable(DT_INST_IRQN(n)); \
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} while (0)
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#define GPIO_NUMAKER_DEFINE(n) \
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static const struct gpio_numaker_config gpio_numaker_config##n = { \
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.common = { \
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n), \
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}, \
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.reg = DT_INST_REG_ADDR(n), \
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.gpa_base = DT_REG_ADDR(DT_NODELABEL(gpioa)), \
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.size = DT_REG_SIZE(DT_NODELABEL(gpioa)), \
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.clk_modidx = DT_INST_CLOCKS_CELL(n, clock_module_index), \
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CLOCK_CTRL_INIT(n)}; \
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\
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static struct gpio_numaker_data gpio_numaker_data##n; \
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\
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static int gpio_numaker_init##n(const struct device *dev) \
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{ \
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const struct gpio_numaker_config *config = dev->config; \
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struct numaker_scc_subsys scc_subsys; \
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int err; \
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\
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SYS_UnlockReg(); \
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memset(&scc_subsys, 0x00, sizeof(scc_subsys)); \
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scc_subsys.subsys_id = NUMAKER_SCC_SUBSYS_ID_PCC; \
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scc_subsys.pcc.clk_modidx = config->clk_modidx; \
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err = clock_control_on(config->clk_dev, (clock_control_subsys_t)&scc_subsys); \
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if (err == 0) { \
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IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 0), (GPIO_NUMAKER_IRQ_INIT(n);)) \
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} \
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\
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SYS_LockReg(); \
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return err; \
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} \
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DEVICE_DT_INST_DEFINE(n, gpio_numaker_init##n, NULL, &gpio_numaker_data##n, \
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&gpio_numaker_config##n, PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY, \
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&gpio_numaker_api);
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DT_INST_FOREACH_STATUS_OKAY(GPIO_NUMAKER_DEFINE)
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