68 lines
2.3 KiB
Plaintext
68 lines
2.3 KiB
Plaintext
# STM32 entropy generator driver configuration
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# Copyright (c) 2017 Erwin Rol <erwin@erwinrol.com>
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# SPDX-License-Identifier: Apache-2.0
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menuconfig ENTROPY_STM32_RNG
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bool "STM32 RNG driver"
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default y
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depends on DT_HAS_ST_STM32_RNG_ENABLED
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select ENTROPY_HAS_DRIVER
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select USE_STM32_LL_RNG
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help
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This option enables the RNG processor, which is a entropy number
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generator, based on a continuous analog noise, that provides
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a entropy 32-bit value to the host when read. It is available for
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F4 (except STM32F401 & STM32F411), L4, F7, H7 and G4 series.
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if ENTROPY_STM32_RNG
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config ENTROPY_STM32_THR_POOL_SIZE
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int "Thread-mode random number pool size"
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range ENTROPY_STM32_THR_THRESHOLD 256
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default 8
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help
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Buffer length in bytes used to store entropy bytes generated by the
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hardware to make them ready for thread mode consumers.
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Please note, that size of the pool must be a power of 2.
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config ENTROPY_STM32_THR_THRESHOLD
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int "Thread-mode random number pool low-water threshold"
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range 4 $(UINT8_MAX)
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help
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Low water-mark threshold in bytes to trigger entropy generation for
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thread mode consumers. As soon as the number of available bytes in the
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buffer goes below this number hardware entropy generation will be
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started.
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config ENTROPY_STM32_ISR_POOL_SIZE
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int "ISR-mode random number pool size"
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range ENTROPY_STM32_ISR_THRESHOLD 256
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default 16
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help
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Buffer length in bytes used to store entropy bytes generated by the
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hardware to make them ready for ISR consumers.
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Please note, that size of the pool must be a power of 2.
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config ENTROPY_STM32_ISR_THRESHOLD
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int "ISR-mode random number pool low-water threshold"
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range 12 $(UINT8_MAX)
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help
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Low water-mark threshold in bytes to trigger entropy generation for
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ISR consumers. As soon as the number of available bytes in the
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buffer goes below this number hardware entropy generation will be
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started.
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config ENTROPY_STM32_CLK_CHECK
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bool "Runtime clock configuration check"
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default y
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help
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Enables a check on RNG clock configuration. Correct clock
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configuration depends on STM32 series. Check reference manual if an
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error is reported.
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This check assumes CED (Clock Error Detected) bit is enabled (when
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available, CED is enabeld by default). Disable this check if CED is
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disabled.
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endif # ENTROPY_STM32_RNG
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