155 lines
3.9 KiB
Plaintext
155 lines
3.9 KiB
Plaintext
# Copyright (c) 2016 Intel Corporation
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# Copyright (c) 2016, Freescale Semiconductor, Inc.
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# SPDX-License-Identifier: Apache-2.0
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config SOC_FAMILY_KINETIS
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bool
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select HAS_SEGGER_RTT
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if SOC_FAMILY_KINETIS
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config SOC_FAMILY
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string
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default "nxp_kinetis"
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source "soc/arm/nxp_kinetis/*/Kconfig.soc"
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config SOC_PART_NUMBER
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default SOC_PART_NUMBER_KINETIS_K2X if SOC_SERIES_KINETIS_K2X
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default SOC_PART_NUMBER_KINETIS_K6X if SOC_SERIES_KINETIS_K6X
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default SOC_PART_NUMBER_KINETIS_K8X if SOC_SERIES_KINETIS_K8X
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default SOC_PART_NUMBER_KINETIS_KWX if SOC_SERIES_KINETIS_KWX
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default SOC_PART_NUMBER_KINETIS_KL2X if SOC_SERIES_KINETIS_KL2X
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default SOC_PART_NUMBER_KINETIS_KE1XF if SOC_SERIES_KINETIS_KE1XF
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default SOC_PART_NUMBER_KINETIS_KV5X if SOC_SERIES_KINETIS_KV5X
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config HAS_OSC
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bool
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help
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Set if the oscillator (OSC) module is present in the SoC.
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config HAS_MCG
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bool
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help
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Set if the multipurpose clock generator (MCG) module is present in the SoC.
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if HAS_OSC
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choice
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prompt "Oscillator Mode Selection"
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default OSC_EXTERNAL
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config OSC_EXTERNAL
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bool "External reference clock"
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help
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Set this option to use the oscillator in external reference clock mode.
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config OSC_LOW_POWER
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bool "Low power oscillator"
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help
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Set this option to use the oscillator in low-power mode.
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config OSC_HIGH_GAIN
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bool "High gain oscillator"
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help
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Set this option to use the oscillator in high-gain mode.
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endchoice
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config OSC_XTAL0_FREQ
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int "External oscillator frequency"
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help
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Set the external oscillator frequency in Hz. This should be set by the
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board's defconfig.
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endif # HAS_OSC
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if HAS_MCG
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config MCG_PRDIV0
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hex "PLL external reference divider"
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range 0 0x18
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default 0
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help
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Selects the amount to divide down the external reference clock for the PLL.
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The resulting frequency must be in the range of 2 MHz to 4 MHz.
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config MCG_VDIV0
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hex "VCO 0 divider"
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range 0 0x1F
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default 0
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help
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Selects the amount to divide the VCO output of the PLL. The VDIV 0 bits
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establish the multiplication factor (M) applied to the reference clock
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frequency.
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config MCG_FCRDIV
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int "Fast internal reference clock divider"
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range 0 7
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default 1
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help
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Selects the amount to divide down the fast internal reference clock. The
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resulting frequency must be in the range 31.25 kHz to 4 MHz.
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config MCG_FRDIV
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int "FLL external reference divider"
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range 0 7
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default 0
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help
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Selects the amount to divide down the external reference clock for the
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FLL. The resulting frequency must be in the range 31.25 kHz to 39.0625
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kHz.
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endif # HAS_MCG
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config KINETIS_FLASH_CONFIG
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bool "Kinetis flash configuration field"
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default y if XIP && !BOOTLOADER_MCUBOOT
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help
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Include the 16-byte flash configuration field that stores default
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protection settings (loaded on reset) and security information that
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allows the MCU to restrict access to the FTFx module.
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if KINETIS_FLASH_CONFIG
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config KINETIS_FLASH_CONFIG_OFFSET
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hex "Kinetis flash configuration field offset"
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default 0x400
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config KINETIS_FLASH_CONFIG_FSEC
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hex "Flash security byte (FSEC)"
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range 0 0xff
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default 0xfe
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help
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Configures the reset value of the FSEC register, which includes
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backdoor key access, mass erase, factory access, and flash security
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options.
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config KINETIS_FLASH_CONFIG_FOPT
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hex "Flash nonvolatile option byte (FOPT)"
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range 0 0xff
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default 0xff
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help
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Configures the reset value of the FOPT register, which includes boot,
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NMI, and EzPort options.
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config KINETIS_FLASH_CONFIG_FEPROT
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hex "EEPROM protection byte (FEPROT)"
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range 0 0xff
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default 0xff
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help
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Configures the reset value of the FEPROT register for FlexNVM
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devices. For program flash only devices, this byte is reserved.
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config KINETIS_FLASH_CONFIG_FDPROT
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hex "Data flash protection byte (FDPROT)"
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range 0 0xff
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default 0xff
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help
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Configures the reset value of the FDPROT register for FlexNVM
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devices. For program flash only devices, this byte is reserved.
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endif # KINETIS_FLASH_CONFIG
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endif # SOC_FAMILY_KINETIS
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