70 lines
2.6 KiB
C
70 lines
2.6 KiB
C
/*
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* Copyright (c) 2019 Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* SoC level DTS fixup file */
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/*
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* UART configuration
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*/
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#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_F0005000_BASE_ADDRESS
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#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_F0005000_IRQ_0
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#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_F0005000_CLOCK_FREQUENCY
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#define DT_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_F0005000_CURRENT_SPEED
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#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_F0005000_LABEL
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#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_F0005000_IRQ_0_PRIORITY
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/*
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* GPIO configuration
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*/
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#define DT_GPIO_DW_0_BASE_ADDR DT_SNPS_DESIGNWARE_GPIO_F0003000_BASE_ADDRESS
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#define DT_GPIO_DW_0_BITS DT_SNPS_DESIGNWARE_GPIO_F0003000_BITS
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#define CONFIG_GPIO_DW_0_NAME DT_SNPS_DESIGNWARE_GPIO_F0003000_LABEL
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#define DT_GPIO_DW_0_IRQ DT_SNPS_DESIGNWARE_GPIO_F0003000_IRQ_0
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#define CONFIG_GPIO_DW_0_IRQ_PRI DT_SNPS_DESIGNWARE_GPIO_F0003000_IRQ_0_PRIORITY
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#define DT_GPIO_DW_0_IRQ_FLAGS 0
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/*
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* SPI configuration
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*/
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#define DT_SPI_0_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_F0020000_BASE_ADDRESS
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#define DT_SPI_0_CLOCK_FREQUENCY DT_SNPS_DESIGNWARE_SPI_F0020000_CLOCK_FREQUENCY
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#define DT_SPI_0_NAME DT_SNPS_DESIGNWARE_SPI_F0020000_LABEL
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#define DT_SPI_0_IRQ DT_SNPS_DESIGNWARE_SPI_F0020000_IRQ_0
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#define DT_SPI_0_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_F0020000_IRQ_0_PRIORITY
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#define DT_SPI_1_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_F0021000_BASE_ADDRESS
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#define DT_SPI_1_CLOCK_FREQUENCY DT_SNPS_DESIGNWARE_SPI_F0021000_CLOCK_FREQUENCY
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#define DT_SPI_1_NAME DT_SNPS_DESIGNWARE_SPI_F0021000_LABEL
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#define DT_SPI_1_IRQ DT_SNPS_DESIGNWARE_SPI_F0021000_IRQ_0
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#define DT_SPI_1_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_F0021000_IRQ_0_PRIORITY
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#define DT_SPI_2_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_F0022000_BASE_ADDRESS
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#define DT_SPI_2_CLOCK_FREQUENCY DT_SNPS_DESIGNWARE_SPI_F0022000_CLOCK_FREQUENCY
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#define DT_SPI_2_NAME DT_SNPS_DESIGNWARE_SPI_F0022000_LABEL
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#define DT_SPI_2_IRQ DT_SNPS_DESIGNWARE_SPI_F0022000_IRQ_0
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#define DT_SPI_2_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_F0022000_IRQ_0_PRIORITY
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#define DT_SPI_DW_IRQ_FLAGS 0
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/*
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* seeed TFT TOUCH SHIELD configuration
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*/
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#define DT_INST_0_ILITEK_ILI9340_BUS_NAME DT_SPI_2_NAME
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#define DT_INST_0_ILITEK_ILI9340_SPI_MAX_FREQUENCY 12000000
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#define DT_INST_0_ILITEK_ILI9340_BASE_ADDRESS 1
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#define DT_INST_0_ILITEK_ILI9340_CS_GPIOS_CONTROLLER CONFIG_GPIO_DW_0_NAME
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#define DT_INST_0_ILITEK_ILI9340_CS_GPIOS_PIN 9
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#define DT_INST_0_ILITEK_ILI9340_CMD_DATA_GPIOS_CONTROLLER CONFIG_GPIO_DW_0_NAME
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#define DT_INST_0_ILITEK_ILI9340_CMD_DATA_GPIOS_PIN 21
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#define DT_INST_0_ILITEK_ILI9340_LABEL "DISPLAY"
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/* End of SoC Level DTS fixup file */
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