zephyr/arch
Alberto Escolar Piedras 7ee41b8776 soc inf (native): Refactor into a top and bottom
Where the bottom is the only one which interacts with
the host operating system.
And the top the only one that interacts or is aware
of the hosted operating system (Zephyr).

The bottom uses the native simulator CPU
start/stop emulation.
By now we replicate its code as a provisional measure,
until the native simulator becomes standard.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-06-23 12:16:26 +02:00
..
arc ARC: SMP: fix livelock in thread abort due to exception 2023-06-08 20:27:06 -04:00
arm arch: arm: enable FPU and FPU sharing for v8r aarch32 2023-06-21 16:06:08 +02:00
arm64 arch: arm64: Use atomic for fpu_owner pointer 2023-06-08 09:35:11 -04:00
common revert: "linker: rom_start_offset: add to address" 2023-03-30 18:19:32 -04:00
mips
nios2 arch: nios2: Remove unused absolute symbols 2023-04-18 10:51:28 -04:00
posix soc inf (native): Refactor into a top and bottom 2023-06-23 12:16:26 +02:00
riscv riscv: syscalls: use zephyr_syscall_header 2023-06-17 07:57:45 -04:00
sparc arch: sparc: Remove unused absolute symbols 2023-04-18 10:51:28 -04:00
x86 x86: x86_64 can only support max 4 CPUs 2023-06-17 07:28:10 -04:00
xtensa debug: coredump: xtensa: Add esp32s3 2023-06-21 16:06:06 -04:00
CMakeLists.txt
Kconfig riscv: privileged: Add support for CLIC vectored mode 2023-06-17 07:48:52 -04:00