51 lines
1.2 KiB
ArmAsm
51 lines
1.2 KiB
ArmAsm
/*
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* Copyright (c) 2022 ITE Corporation.
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* SPDX-License-Identifier: Apache-2.0
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*
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* When the 'M' extension is disabled, compiler can not recognize div/mul
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* instructions. So mul/div instructions in the below integer arithmetic
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* routines are hard coded by opcodes.
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*
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* IMPORTANT:
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* The workaround requires the nop instruction, please don't optimize it.
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*/
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#ifdef CONFIG_SOC_IT8XXX2_USE_ILM
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#define SECTION .__ram_code.arithmetic.
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#else
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#define SECTION .text.it8xxx2.arithmetic.
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#endif
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.macro __int_arithmetic func opcode
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.section SECTION\func
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.align 2
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.globl \func
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.type \func, @function
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\func:
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.word \opcode
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nop
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ret
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.size \func, .-\func
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.endm
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/* signed 32 bit multiplication. opcode of mul a0,a0,a1 is 0x02b50533 */
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__int_arithmetic __mulsi3 0x02b50533
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/* signed 32 bit division. opcode of div a0,a0,a1 is 0x02b54533 */
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__int_arithmetic __divsi3 0x02b54533
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/* unsigned 32 bit division. opcode of divu a0,a0,a1 is 0x02b55533 */
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__int_arithmetic __udivsi3 0x02b55533
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/*
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* This function return the remainder of the signed division.
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* opcode of rem a0,a0,a1 is 0x02b56533
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*/
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__int_arithmetic __modsi3 0x02b56533
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/*
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* This function return the remainder of the unsigned division.
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* opcode of remu a0,a0,a1 is 0x02b57533
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*/
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__int_arithmetic __umodsi3 0x02b57533
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