106 lines
3.2 KiB
C
106 lines
3.2 KiB
C
/*
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* Copyright (c) 2016 Open-RnD Sp. z o.o.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file Interrupt numbers for STM32F1 family processors.
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*
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* Based on reference manual:
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* STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and STM32F107xx
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* advanced ARM ® -based 32-bit MCUs
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*
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* Chapter 10.1.2: Interrupt and exception vectors
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*/
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#ifndef _STM32F1_SOC_IRQ_H_
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#define _STM32F1_SOC_IRQ_H_
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#define STM32F1_IRQ_WWDG 0
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#define STM32F1_IRQ_PVD 1
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#define STM32F1_IRQ_TAMPER 2
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#define STM32F1_IRQ_RTC 3
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#define STM32F1_IRQ_FLAGS 4
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#define STM32F1_IRQ_RCC 5
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#define STM32F1_IRQ_EXTI0 6
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#define STM32F1_IRQ_EXTI1 7
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#define STM32F1_IRQ_EXTI2 8
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#define STM32F1_IRQ_EXTI3 9
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#define STM32F1_IRQ_EXTI4 10
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#define STM32F1_IRQ_DMA1_CH1 11
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#define STM32F1_IRQ_DMA1_CH2 12
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#define STM32F1_IRQ_DMA1_CH3 13
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#define STM32F1_IRQ_DMA1_CH4 14
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#define STM32F1_IRQ_DMA1_CH5 15
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#define STM32F1_IRQ_DMA1_CH6 16
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#define STM32F1_IRQ_DMA1_CH7 17
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#define STM32F1_IRQ_ADC1_2 18
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#define STM32F1_IRQ_USB_HP_CAN_TX 19
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#define STM32F1_IRQ_USB_LP_CAN_RX0 20
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#define STM32F1_IRQ_CAN_RX1 21
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#define STM32F1_IRQ_CAN_SCE 22
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#define STM32F1_IRQ_EXTI9_5 23
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#define STM32F1_IRQ_TIM1_BRK 24
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#define STM32F1_IRQ_TIM1_UP 25
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#define STM32F1_IRQ_TIM1_TRG_COM 26
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#define STM32F1_IRQ_TIM1_CC 27
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#define STM32F1_IRQ_TIM2 28
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#define STM32F1_IRQ_TIM3 29
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#define STM32F1_IRQ_TIM4 30
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#define STM32F1_IRQ_I2C1_EV 31
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#define STM32F1_IRQ_I2C1_ER 32
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#define STM32F1_IRQ_I2C2_EV 33
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#define STM32F1_IRQ_I2C2_ER 34
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#define STM32F1_IRQ_SPI1 35
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#define STM32F1_IRQ_SPI2 36
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#define STM32F1_IRQ_USART1 37
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#define STM32F1_IRQ_USART2 38
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#define STM32F1_IRQ_USART3 39
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#define STM32F1_IRQ_EXTI15_10 40
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#define STM32F1_IRQ_RTC_ALARM 41
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#define STM32F1_IRQ_USB_WAKEUP 42
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#define STM32F1_IRQ_OTG_FS_WKUP STM32F1_IRQ_USB_WAKEUP
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#define STM32F1_IRQ_TIM8_BRK 43
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#define STM32F1_IRQ_TIM8_UP 44
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#define STM32F1_IRQ_TIM8_TRG_COM 45
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#define STM32F1_IRQ_TIM8_CC 46
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#define STM32F1_IRQ_ADC3 47
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#define STM32F1_IRQ_FSMC 48
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#define STM32F1_IRQ_SDIO 49
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#define STM32F1_IRQ_TIM5 50
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#define STM32F1_IRQ_SPI3 51
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#define STM32F1_IRQ_UART4 52
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#define STM32F1_IRQ_UART5 53
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#define STM32F1_IRQ_TIM6 54
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#define STM32F1_IRQ_TIM7 55
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#define STM32F1_IRQ_DMA2_CH1 56
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#define STM32F1_IRQ_DMA2_CH2 57
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#define STM32F1_IRQ_DMA2_CH3 58
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#define STM32F1_IRQ_DMA2_CH4_5 59
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/* IRQs below this point are available on connectivity line
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* devices only
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*/
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#define STM32F1_IRQ_DMA2_CH4 STM32F1_IRQ_DMA2_CH4_5
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#define STM32F1_IRQ_DMA2_CH5 60
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#define STM32F1_IRQ_ETH 61
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#define STM32F1_IRQ_ETH_WKUP 62
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#define STM32F1_IRQ_CAN2_TX 63
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#define STM32F1_IRQ_CAN2_RX0 64
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#define STM32F1_IRQ_CAN2_RX1 65
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#define STM32F1_IRQ_CAN2_SCE 66
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#define STM32F1_IRQ_OTG_FS 67
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#endif /* _STM32F1_SOC_IRQ_H_ */
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