120 lines
2.9 KiB
C
120 lines
2.9 KiB
C
/*
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* Copyright (c) 2016 Nordic Semiconductor ASA
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* Copyright (c) 2016 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief System/hardware module for Nordic Semiconductor nRF51 family processor
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*
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* This module provides routines to initialize and support board-level hardware
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* for the Nordic Semiconductor nRF51 family processor.
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*/
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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#include <soc.h>
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#ifdef CONFIG_RUNTIME_NMI
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extern void _NmiInit(void);
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#define NMI_INIT() _NmiInit()
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#else
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#define NMI_INIT()
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#endif
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#include "nrf.h"
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#define __SYSTEM_CLOCK (16000000UL)
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static bool ftpan_26(void);
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static bool ftpan_59(void);
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uint32_t SystemCoreClock __used = __SYSTEM_CLOCK;
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static int nordicsemi_nrf51_init(struct device *arg)
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{
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u32_t key;
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ARG_UNUSED(arg);
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/* Note:
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* Magic numbers below are obtained by reading the registers
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* when the SoC was running the SAM-BA bootloader
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* (with reserved bits set to 0).
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*/
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key = irq_lock();
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/* Prepare the peripherals for use as indicated by the PAN 26 "System:
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* Manual setup is required to enable the use of peripherals" found at
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* Product Anomaly document for your device found at
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* https://www.nordicsemi.com/. The side effect of executing these
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* instructions in the devices that do not need it is that the new
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* peripherals in the second generation devices (LPCOMP for example)
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* will not be available.
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*/
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if (ftpan_26()) {
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*(volatile u32_t *)0x40000504 = 0xC007FFDF;
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*(volatile u32_t *)0x40006C18 = 0x00008000;
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}
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/* Disable PROTENSET registers under debug, as indicated by PAN 59
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* "MPU: Reset value of DISABLEINDEBUG register is incorrect" found
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* at Product Anomaly document for your device found at
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* https://www.nordicsemi.com/.
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*/
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if (ftpan_59()) {
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NRF_MPU->DISABLEINDEBUG =
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MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled <<
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MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
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}
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/* Install default handler that simply resets the CPU
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* if configured in the kernel, NOP otherwise
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*/
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NMI_INIT();
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irq_unlock(key);
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return 0;
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}
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static bool ftpan_26(void)
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{
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if ((((*(u32_t *)0xF0000FE0) & 0x000000FF) == 0x1) &&
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(((*(u32_t *)0xF0000FE4) & 0x0000000F) == 0x0)) {
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if ((((*(u32_t *)0xF0000FE8) & 0x000000F0) == 0x00) &&
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(((*(u32_t *)0xF0000FEC) & 0x000000F0) == 0x0)) {
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return true;
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}
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if ((((*(u32_t *)0xF0000FE8) & 0x000000F0) == 0x10) &&
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(((*(u32_t *)0xF0000FEC) & 0x000000F0) == 0x0)) {
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return true;
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}
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if ((((*(u32_t *)0xF0000FE8) & 0x000000F0) == 0x30) &&
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(((*(u32_t *)0xF0000FEC) & 0x000000F0) == 0x0)) {
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return true;
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}
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}
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return false;
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}
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static bool ftpan_59(void)
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{
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if ((((*(u32_t *)0xF0000FE0) & 0x000000FF) == 0x1) &&
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(((*(u32_t *)0xF0000FE4) & 0x0000000F) == 0x0)) {
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if ((((*(u32_t *)0xF0000FE8) & 0x000000F0) == 0x40) &&
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(((*(u32_t *)0xF0000FEC) & 0x000000F0) == 0x0)) {
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return true;
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}
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}
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return false;
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}
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SYS_INIT(nordicsemi_nrf51_init, PRE_KERNEL_1, 0);
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