Bhavesh Bhojwani 2510c89236 dts/arm: st: g0: closes parenthesis for soc ... This commit adds a closing parenthesis for soc model of stm32g050. Resolves issue #36014 Signed-off-by: Bhavesh Bhojwani <bhaavesh.bhojwaani@gmail.com>		2021-06-08 11:15:00 -05:00
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arc	…
arm	dts/arm: st: g0: closes parenthesis for soc	2021-06-08 11:15:00 -05:00
arm64	board: nxp_ls1046ardb: add 2 cores smp for running in Jailhouse	2021-04-22 11:29:54 +02:00
bindings	dts: bindings: mchp: Convert vw_irq to array	2021-06-07 23:52:17 -04:00
common	dts/arm: stm32: Add clocks nodes on stm32wb,l4 and stm32f4 series	2021-04-27 11:53:37 +02:00
nios2	nios2: max10: fix uart0 base register	2021-05-26 18:09:47 -05:00
posix	…
riscv	drivers: gpio_litex: add support for changing IRQ type	2021-06-04 16:24:52 -05:00
sparc	…
x86	drivers: gpio: Add GPIO driver for Intel Elkhart Lake	2021-05-07 09:45:50 -04:00
xtensa	esp32: drivers: spi_flash: add host flash support	2021-03-06 09:34:35 -05:00
Kconfig	…
binding-template.yaml	doc: devicetree: overhaul bindings guide	2021-04-22 15:32:10 +02:00