zephyr/soc/xtensa/intel_s1000
Daniel Leung 4962bf3875 soc: intel_s1000: fix SMP build error
During devicetree macro changes, LPSRAM_BOOT_VECTOR_ADDR
pointed to another macro which was renamed to a non-existent
one. Fix it so that SMP builds again.

Fixes #24720

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-29 14:59:33 -05:00
..
include global: Remove leading/trailing blank lines in files 2019-12-11 19:17:27 +01:00
xcc libc: Move xtensa reentrant syscall impl to common libc-hooks 2020-02-03 14:57:10 -06:00
CMakeLists.txt soc: intel_s1000: add SMP support 2020-03-25 19:07:28 -04:00
Kconfig.defconfig soc: intel_s1000: add SMP support 2020-03-25 19:07:28 -04:00
Kconfig.soc xtensa: enable XTENSA_HAL at SoC level 2020-04-08 13:10:35 -07:00
iomux.h
linker.ld soc: xtensa: rework DT_L2_SRAM and DT_L2_SRAM 2020-04-25 09:32:00 -05:00
memory.h soc: intel_s1000: fix SMP build error 2020-04-29 14:59:33 -05:00
soc.c intc: intc_cavs: Use DTS labels for device names 2020-04-22 04:59:22 -05:00
soc.h soc: xtensa: replace DT_CAVS_ICTL_x_IRQ with new dt macros 2020-04-22 04:59:22 -05:00
soc_mp.c soc: xtensa: Convert to new DT_INST macros 2020-03-27 10:06:14 -05:00