37516a7818
The SoCs usually have devices that are accessed through MMIO. This requires the corresponding regions to be marked readable and writable in the MMU or else accesses will result in page faults. This adds a function which can be implemented in the SoC code to specify those pages to be added to MMU. Signed-off-by: Daniel Leung <daniel.leung@intel.com> |
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| .. | ||
| core | ||
| include | ||
| CMakeLists.txt | ||
| Kconfig | ||
| gen_gdt.py | ||
| gen_idt.py | ||
| ia32.cmake | ||
| intel64.cmake | ||