39 lines
732 B
Plaintext
39 lines
732 B
Plaintext
/*
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* Copyright (c) 2018 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <st/f3/stm32f373.dtsi>
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/ {
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};
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soc {
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flash-controller@40022000 {
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flash0: flash@8000000 {
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reg = <0x08000000 DT_SIZE_K(256)>;
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};
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};
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dma2: dma@40020400 {
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compatible = "st,stm32-dma-v2bis";
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reg = <0x40020400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
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interrupts = <56 0 57 0 58 0 59 0 60 0>;
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status = "disabled";
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};
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dac2: dac@40009800 {
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compatible = "st,stm32-dac";
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reg = <0x40009800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>;
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status = "disabled";
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#io-channel-cells = <1>;
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};
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};
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};
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