176 lines
5.4 KiB
C
176 lines
5.4 KiB
C
/* context.c - new context creation for ARCv2 */
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/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* DESCRIPTION
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* Core nanokernel fiber related primitives for the ARCv2 processor
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* architecture.
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*/
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#include <nanokernel.h>
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#include <arch/cpu.h>
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#include <toolchain.h>
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#include <nano_private.h>
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#include <offsets.h>
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#include <wait_q.h>
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/* initial stack frame */
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struct init_stack_frame {
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uint32_t pc;
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uint32_t status32;
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uint32_t r3;
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uint32_t r2;
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uint32_t r1;
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uint32_t r0;
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};
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tNANO _nanokernel = {0};
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#if defined(CONFIG_CONTEXT_MONITOR)
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#define CONTEXT_MONITOR_INIT(pCcs) context_monitor_init(pCcs)
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#else
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#define CONTEXT_MONITOR_INIT(pCcs) \
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do {/* do nothing */ \
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} while ((0))
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#endif
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#if defined(CONFIG_CONTEXT_MONITOR)
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/*
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* context_monitor_init - initialize context monitoring support
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*
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* Currently only inserts the new context in the list of active contexts.
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*
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* RETURNS: N/A
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*/
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static ALWAYS_INLINE void context_monitor_init(struct ccs *pCcs /* context */
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)
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{
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unsigned int key;
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/*
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* Add the newly initialized context to head of the list of contexts.
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* This singly linked list of contexts maintains ALL the contexts in the
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* system: both tasks and fibers regardless of whether they are
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* runnable.
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*/
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key = irq_lock_inline();
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pCcs->next_context = _nanokernel.contexts;
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_nanokernel.contexts = pCcs;
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irq_unlock_inline(key);
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}
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#endif /* CONFIG_CONTEXT_MONITOR */
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/*
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* _NewContext - initialize a new context (thread) from its stack space
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*
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* The control structure (CCS) is put at the lower address of the stack. An
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* initial context, to be "restored" by __return_from_coop(), is put at
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* the other end of the stack, and thus reusable by the stack when not
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* needed anymore.
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*
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* The initial context is a basic stack frame that contains arguments for
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* _context_entry() return address, that points at _context_entry()
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* and status register.
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*
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* <options> is currently unused.
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*
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* RETURNS: N/A
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*/
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void _NewContext(
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char *pStackMem, /* pointer to aligned stack memory */
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unsigned stackSize, /* stack size in bytes */
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_ContextEntry pEntry, /* context (thread) entry point routine */
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void *parameter1, /* first param to entry point */
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void *parameter2, /* second param to entry point */
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void *parameter3, /* third param to entry point */
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int priority, /* fiber priority, -1 for task */
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unsigned options /* unused, for expansion */
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)
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{
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char *stackEnd = pStackMem + stackSize;
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struct init_stack_frame *pInitCtx;
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tCCS *pCcs = (tCCS *) pStackMem;
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#ifdef CONFIG_INIT_STACKS
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k_memset(pStackMem, 0xaa, stackSize);
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#endif
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/* carve the context entry struct from the "base" of the stack */
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pInitCtx = (struct init_stack_frame *)(STACK_ROUND_DOWN(stackEnd) -
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sizeof(struct init_stack_frame));
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pInitCtx->pc = ((uint32_t)_ContextEntryWrapper);
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pInitCtx->r0 = (uint32_t)pEntry;
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pInitCtx->r1 = (uint32_t)parameter1;
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pInitCtx->r2 = (uint32_t)parameter2;
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pInitCtx->r3 = (uint32_t)parameter3;
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/*
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* For now set the interrupt priority to 15
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* we can leave interrupt enable flag set to 0 as
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* seti instruction in the end of the _Swap() will
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* enable the interrupts based on intlock_key
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* value.
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*/
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pInitCtx->status32 = _ARC_V2_STATUS32_E(_ARC_V2_DEF_IRQ_LEVEL);
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pCcs->link = NULL;
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pCcs->flags = priority == -1 ? TASK | PREEMPTIBLE : FIBER;
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pCcs->prio = priority;
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#ifdef CONFIG_CONTEXT_CUSTOM_DATA
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/* Initialize custom data field (value is opaque to kernel) */
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pCcs->custom_data = NULL;
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#endif
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/*
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* intlock_key is constructed based on ARCv2 ISA Programmer's
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* Reference Manual CLRI instruction description:
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* dst[31:6] dst[5] dst[4] dst[3:0]
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* 26'd0 1 STATUS32.IE STATUS32.E[3:0]
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*/
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pCcs->intlock_key = 0x3F;
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pCcs->relinquish_cause = _CAUSE_COOP;
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pCcs->preempReg.sp = (uint32_t)pInitCtx - __tCalleeSaved_SIZEOF;
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_nano_timeout_ccs_init(pCcs);
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/* initial values in all other registers/CCS entries are irrelevant */
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CONTEXT_MONITOR_INIT(pCcs);
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}
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