249 lines
6.2 KiB
ArmAsm
249 lines
6.2 KiB
ArmAsm
/*
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* Copyright (c) 2014-2015 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Thread context switching
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*
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* This module implements the routines necessary for thread context switching
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* on ARCv2 CPUs.
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*
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* See isr_wrapper.S for details.
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*/
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#include <kernel_structs.h>
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#include <offsets_short.h>
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#include <toolchain.h>
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#include <arch/cpu.h>
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#include <v2/irq.h>
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#include <swap_macros.h>
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GTEXT(__swap)
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GDATA(_k_neg_eagain)
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GDATA(_kernel)
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/**
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*
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* @brief Initiate a cooperative context switch
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*
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* The __swap() routine is invoked by various kernel services to effect
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* a cooperative context switch. Prior to invoking __swap(), the caller
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* disables interrupts via irq_lock() and the return 'key' is passed as a
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* parameter to __swap(). The key is in fact the value stored in the register
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* operand of a CLRI instruction.
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*
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* It stores the intlock key parameter into current->intlock_key.
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* Given that __swap() is called to effect a cooperative context switch,
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* the caller-saved integer registers are saved on the stack by the function
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* call preamble to __swap(). This creates a custom stack frame that will be
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* popped when returning from __swap(), but is not suitable for handling a
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* return from an exception. Thus, the fact that the thread is pending because
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* of a cooperative call to __swap() has to be recorded via the _CAUSE_COOP code
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* in the relinquish_cause of the thread's k_thread structure. The
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* _IrqExit()/_FirqExit() code will take care of doing the right thing to
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* restore the thread status.
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*
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* When __swap() is invoked, we know the decision to perform a context switch or
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* not has already been taken and a context switch must happen.
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*
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* @return may contain a return value setup by a call to
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* _set_thread_return_value()
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*
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* C function prototype:
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*
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* unsigned int __swap (unsigned int key);
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*
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*/
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SECTION_FUNC(TEXT, __swap)
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#ifdef CONFIG_EXECUTION_BENCHMARKING
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mov r1, _kernel
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ld_s r2, [r1, _kernel_offset_to_current]
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_save_callee_saved_regs
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push_s r31
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bl read_timer_start_of_swap
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pop_s r31
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mov r1, _kernel
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ld_s r2, [r1, _kernel_offset_to_current]
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_load_callee_saved_regs
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st sp, [r2, _thread_offset_to_sp]
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#endif
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/* interrupts are locked, interrupt key is in r0 */
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mov r1, _kernel
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ld_s r2, [r1, _kernel_offset_to_current]
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/* save intlock key */
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st_s r0, [r2, _thread_offset_to_intlock_key]
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st _CAUSE_COOP, [r2, _thread_offset_to_relinquish_cause]
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/*
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* Carve space for the return value. Setting it to a default of
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* -EAGAIN eliminates the need for the timeout code to set it.
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* If another value is ever needed, it can be modified with
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* _set_thread_return_value().
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*/
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ld r3, [_k_neg_eagain]
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st_s r3, [r2, _thread_offset_to_return_value]
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/*
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* Save status32 and blink on the stack before the callee-saved registers.
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* This is the same layout as the start of an IRQ stack frame.
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*/
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lr r3, [_ARC_V2_STATUS32]
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push_s r3
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#ifdef CONFIG_ARC_HAS_SECURE
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lr r3, [_ARC_V2_SEC_STAT]
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push_s r3
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#endif
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#ifdef CONFIG_ARC_STACK_CHECKING
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#ifdef CONFIG_ARC_HAS_SECURE
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bclr r3, r3, _ARC_V2_SEC_STAT_SSC_BIT
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/* sflag r3 */
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/* sflag instruction is not supported in current ARC GNU */
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.long 0x00ff302f
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#else
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/* disable stack checking during swap */
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bclr r3, r3, _ARC_V2_STATUS32_SC_BIT
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kflag r3
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#endif
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#endif
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push_s blink
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_save_callee_saved_regs
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/* get the cached thread to run */
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ld_s r2, [r1, _kernel_offset_to_ready_q_cache]
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/* entering here, r2 contains the new current thread */
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#ifdef CONFIG_ARC_STACK_CHECKING
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_load_stack_check_regs
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#endif
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/* XXX - can be moved to delay slot of _CAUSE_RIRQ ? */
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st_s r2, [r1, _kernel_offset_to_current]
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_load_callee_saved_regs
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#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
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push_s r2
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mov r0, r2
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bl configure_mpu_thread
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pop_s r2
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#endif
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ld_s r3, [r2, _thread_offset_to_relinquish_cause]
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breq r3, _CAUSE_RIRQ, _swap_return_from_rirq
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nop
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breq r3, _CAUSE_FIRQ, _swap_return_from_firq
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nop
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/* fall through to _swap_return_from_coop */
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.balign 4
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_swap_return_from_coop:
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ld_s r1, [r2, _thread_offset_to_intlock_key]
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st 0, [r2, _thread_offset_to_intlock_key]
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ld_s r0, [r2, _thread_offset_to_return_value]
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lr ilink, [_ARC_V2_STATUS32]
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bbit1 ilink, _ARC_V2_STATUS32_AE_BIT, _return_from_exc
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pop_s blink /* pc into blink */
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#ifdef CONFIG_ARC_HAS_SECURE
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pop_s r3 /* pop SEC_STAT */
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/* sflag r3 */
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/* sflag instruction is not supported in current ARC GNU */
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.long 0x00ff302f
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#endif
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#ifdef CONFIG_EXECUTION_BENCHMARKING
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b _capture_value_for_benchmarking
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#endif
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return_loc:
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pop_s r3 /* status32 into r3 */
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kflag r3 /* write status32 */
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j_s.d [blink] /* always execute delay slot */
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seti r1 /* delay slot */
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.balign 4
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_swap_return_from_rirq:
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_swap_return_from_firq:
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lr r3, [_ARC_V2_STATUS32]
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bbit1 r3, _ARC_V2_STATUS32_AE_BIT, _return_from_exc_irq
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/* pretend interrupt happened to use rtie instruction */
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#ifdef CONFIG_ARC_HAS_SECURE
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lr r3, [_ARC_V2_SEC_STAT]
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/* set SEC_STAT.IRM = SECURE for interrupt return */
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bset r3, r3, 3
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/* sflag r3 */
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/* sflag instruction is not supported in current ARC GNU */
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.long 0x00ff302f
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#endif
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lr r3, [_ARC_V2_AUX_IRQ_ACT]
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brne r3, 0, _swap_already_in_irq
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/* use lowest interrupt priority */
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or r3, r3, (1<<(CONFIG_NUM_IRQ_PRIO_LEVELS-1))
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sr r3, [_ARC_V2_AUX_IRQ_ACT]
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_swap_already_in_irq:
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rtie
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.balign 4
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_return_from_exc_irq:
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_pop_irq_stack_frame
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sub_s sp, sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET + 4
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_return_from_exc:
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/* put the return address to eret */
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ld ilink, [sp] /* pc into ilink */
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sr ilink, [_ARC_V2_ERET]
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/* SEC_STAT is bypassed when CONFIG_ARC_HAS_SECURE */
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/* put status32 into estatus */
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ld ilink, [sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET]
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sr ilink, [_ARC_V2_ERSTATUS]
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add_s sp, sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET + 4
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rtie
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#ifdef CONFIG_EXECUTION_BENCHMARKING
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.balign 4
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_capture_value_for_benchmarking:
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mov r1, _kernel
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ld_s r2, [r1, _kernel_offset_to_current]
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_save_callee_saved_regs
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push_s blink
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bl read_timer_end_of_swap
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pop_s blink
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mov r1, _kernel
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ld_s r2, [r1, _kernel_offset_to_current]
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_load_callee_saved_regs
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st sp, [r2, _thread_offset_to_sp]
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b return_loc
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#endif /* CONFIG_EXECUTION_BENCHMARKING */
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