71 lines
1.7 KiB
C
71 lines
1.7 KiB
C
/*
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* Copyright (c) 2018, Piotr Mienkowski
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr.h>
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#include <power/power.h>
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#include <em_emu.h>
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#include <logging/log.h>
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LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
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/*
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* Power state map:
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* SYS_POWER_STATE_SLEEP_1: EM1 Sleep
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* SYS_POWER_STATE_SLEEP_2: EM2 Deep Sleep
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* SYS_POWER_STATE_SLEEP_3: EM3 Stop
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*/
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/* Invoke Low Power/System Off specific Tasks */
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void sys_set_power_state(enum power_states state)
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{
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LOG_DBG("SoC entering power state %d", state);
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/* FIXME: When this function is entered the Kernel has disabled
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* interrupts using BASEPRI register. This is incorrect as it prevents
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* waking up from any interrupt which priority is not 0. Work around the
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* issue and disable interrupts using PRIMASK register as recommended
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* by ARM.
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*/
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/* Set PRIMASK */
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__disable_irq();
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/* Set BASEPRI to 0 */
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irq_unlock(0);
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switch (state) {
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#ifdef CONFIG_SYS_POWER_SLEEP_STATES
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#ifdef CONFIG_HAS_SYS_POWER_STATE_SLEEP_1
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case SYS_POWER_STATE_SLEEP_1:
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EMU_EnterEM1();
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break;
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#endif /* CONFIG_HAS_SYS_POWER_STATE_SLEEP_1 */
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#ifdef CONFIG_HAS_SYS_POWER_STATE_SLEEP_2
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case SYS_POWER_STATE_SLEEP_2:
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EMU_EnterEM2(true);
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break;
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#endif /* CONFIG_HAS_SYS_POWER_STATE_SLEEP_2 */
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#ifdef CONFIG_HAS_SYS_POWER_STATE_SLEEP_3
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case SYS_POWER_STATE_SLEEP_3:
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EMU_EnterEM3(true);
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break;
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#endif /* CONFIG_HAS_SYS_POWER_STATE_SLEEP_3 */
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#endif /* CONFIG_SYS_POWER_SLEEP_STATES */
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default:
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LOG_DBG("Unsupported power state %u", state);
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break;
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}
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LOG_DBG("SoC leaving power state %d", state);
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/* Clear PRIMASK */
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__enable_irq();
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}
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/* Handle SOC specific activity after Low Power Mode Exit */
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void _sys_pm_power_state_exit_post_ops(enum power_states state)
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{
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ARG_UNUSED(state);
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}
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