Andrew Boie 4455ee6d87 ARM: rebase available priority levels to 0 ... We have a new policy: users should not be able to configure an interrupt with "forbidden" priority levels, and any priority levels with special semantics will be activated by flags. Change-Id: I757c19cfedcb1d0938eaf4da348ddafb71b3e001 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>		2016-02-08 21:47:35 -05:00
..
core	ARM: rebase available priority levels to 0	2016-02-08 21:47:35 -05:00
include	idle: fix tasks waiting when NANO_TIMEOUTS is enabled	2016-02-05 20:25:24 -05:00
soc	i2c: adds driver for Atmel SAM3	2016-02-08 21:45:07 -05:00
Kbuild	build: fix issue with static interrupts on ARC/ARM	2016-02-05 20:25:25 -05:00
Kconfig	arm: add support for linking images entirely in SRAM	2016-02-05 20:25:24 -05:00
Makefile	Move compiler optimization to the SoC	2016-02-05 20:25:29 -05:00
defconfig	Use SoC instead of platform.	2016-02-05 20:25:11 -05:00