287 lines
8.3 KiB
C
287 lines
8.3 KiB
C
/*
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* Copyright (c) 2018 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/device.h>
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#include <zephyr/drivers/timer/system_timer.h>
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#include <zephyr/sys_clock.h>
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#include <zephyr/spinlock.h>
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#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
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#include <zephyr/irq.h>
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#define COUNTER_MAX 0x00ffffff
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#define TIMER_STOPPED 0xff000000
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#define CYC_PER_TICK (sys_clock_hw_cycles_per_sec() \
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/ CONFIG_SYS_CLOCK_TICKS_PER_SEC)
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#define MAX_TICKS ((COUNTER_MAX / CYC_PER_TICK) - 1)
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#define MAX_CYCLES (MAX_TICKS * CYC_PER_TICK)
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/* Minimum cycles in the future to try to program. Note that this is
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* NOT simply "enough cycles to get the counter read and reprogrammed
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* reliably" -- it becomes the minimum value of the LOAD register, and
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* thus reflects how much time we can reliably see expire between
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* calls to elapsed() to read the COUNTFLAG bit. So it needs to be
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* set to be larger than the maximum time the interrupt might be
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* masked. Choosing a fraction of a tick is probably a good enough
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* default, with an absolute minimum of 1k cyc.
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*/
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#define MIN_DELAY MAX(1024, (CYC_PER_TICK/16))
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#define TICKLESS (IS_ENABLED(CONFIG_TICKLESS_KERNEL))
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static struct k_spinlock lock;
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static uint32_t last_load;
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/*
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* This local variable holds the amount of SysTick HW cycles elapsed
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* and it is updated in sys_clock_isr() and sys_clock_set_timeout().
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*
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* Note:
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* At an arbitrary point in time the "current" value of the SysTick
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* HW timer is calculated as:
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*
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* t = cycle_counter + elapsed();
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*/
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static uint32_t cycle_count;
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/*
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* This local variable holds the amount of elapsed SysTick HW cycles
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* that have been announced to the kernel.
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*/
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static uint32_t announced_cycles;
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/*
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* This local variable holds the amount of elapsed HW cycles due to
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* SysTick timer wraps ('overflows') and is used in the calculation
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* in elapsed() function, as well as in the updates to cycle_count.
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*
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* Note:
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* Each time cycle_count is updated with the value from overflow_cyc,
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* the overflow_cyc must be reset to zero.
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*/
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static volatile uint32_t overflow_cyc;
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/* This internal function calculates the amount of HW cycles that have
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* elapsed since the last time the absolute HW cycles counter has been
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* updated. 'cycle_count' may be updated either by the ISR, or when we
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* re-program the SysTick.LOAD register, in sys_clock_set_timeout().
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*
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* Additionally, the function updates the 'overflow_cyc' counter, that
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* holds the amount of elapsed HW cycles due to (possibly) multiple
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* timer wraps (overflows).
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*
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* Prerequisites:
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* - reprogramming of SysTick.LOAD must be clearing the SysTick.COUNTER
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* register and the 'overflow_cyc' counter.
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* - ISR must be clearing the 'overflow_cyc' counter.
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* - no more than one counter-wrap has occurred between
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* - the timer reset or the last time the function was called
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* - and until the current call of the function is completed.
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* - the function is invoked with interrupts disabled.
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*/
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static uint32_t elapsed(void)
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{
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uint32_t val1 = SysTick->VAL; /* A */
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uint32_t ctrl = SysTick->CTRL; /* B */
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uint32_t val2 = SysTick->VAL; /* C */
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/* SysTick behavior: The counter wraps at zero automatically,
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* setting the COUNTFLAG field of the CTRL register when it
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* does. Reading the control register automatically clears
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* that field.
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*
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* If the count wrapped...
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* 1) Before A then COUNTFLAG will be set and val1 >= val2
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* 2) Between A and B then COUNTFLAG will be set and val1 < val2
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* 3) Between B and C then COUNTFLAG will be clear and val1 < val2
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* 4) After C we'll see it next time
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*
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* So the count in val2 is post-wrap and last_load needs to be
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* added if and only if COUNTFLAG is set or val1 < val2.
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*/
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if ((ctrl & SysTick_CTRL_COUNTFLAG_Msk)
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|| (val1 < val2)) {
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overflow_cyc += last_load;
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/* We know there was a wrap, but we might not have
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* seen it in CTRL, so clear it. */
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(void)SysTick->CTRL;
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}
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return (last_load - val2) + overflow_cyc;
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}
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/* Callout out of platform assembly, not hooked via IRQ_CONNECT... */
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void sys_clock_isr(void *arg)
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{
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ARG_UNUSED(arg);
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uint32_t dticks;
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/* Update overflow_cyc and clear COUNTFLAG by invoking elapsed() */
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elapsed();
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/* Increment the amount of HW cycles elapsed (complete counter
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* cycles) and announce the progress to the kernel.
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*/
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cycle_count += overflow_cyc;
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overflow_cyc = 0;
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if (TICKLESS) {
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/* In TICKLESS mode, the SysTick.LOAD is re-programmed
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* in sys_clock_set_timeout(), followed by resetting of
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* the counter (VAL = 0).
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*
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* If a timer wrap occurs right when we re-program LOAD,
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* the ISR is triggered immediately after sys_clock_set_timeout()
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* returns; in that case we shall not increment the cycle_count
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* because the value has been updated before LOAD re-program.
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*
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* We can assess if this is the case by inspecting COUNTFLAG.
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*/
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dticks = (cycle_count - announced_cycles) / CYC_PER_TICK;
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announced_cycles += dticks * CYC_PER_TICK;
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sys_clock_announce(dticks);
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} else {
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sys_clock_announce(1);
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}
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z_arm_int_exit();
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}
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void sys_clock_set_timeout(int32_t ticks, bool idle)
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{
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/* Fast CPUs and a 24 bit counter mean that even idle systems
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* need to wake up multiple times per second. If the kernel
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* allows us to miss tick announcements in idle, then shut off
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* the counter. (Note: we can assume if idle==true that
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* interrupts are already disabled)
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*/
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if (IS_ENABLED(CONFIG_TICKLESS_KERNEL) && idle && ticks == K_TICKS_FOREVER) {
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SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
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last_load = TIMER_STOPPED;
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return;
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}
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#if defined(CONFIG_TICKLESS_KERNEL)
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uint32_t delay;
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uint32_t val1, val2;
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uint32_t last_load_ = last_load;
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ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : ticks;
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ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint32_t pending = elapsed();
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val1 = SysTick->VAL;
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cycle_count += pending;
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overflow_cyc = 0U;
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uint32_t unannounced = cycle_count - announced_cycles;
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if ((int32_t)unannounced < 0) {
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/* We haven't announced for more than half the 32-bit
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* wrap duration, because new timeouts keep being set
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* before the existing one fires. Force an announce
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* to avoid loss of a wrap event, making sure the
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* delay is at least the minimum delay possible.
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*/
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last_load = MIN_DELAY;
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} else {
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/* Desired delay in the future */
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delay = ticks * CYC_PER_TICK;
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/* Round delay up to next tick boundary */
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delay += unannounced;
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delay =
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((delay + CYC_PER_TICK - 1) / CYC_PER_TICK) * CYC_PER_TICK;
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delay -= unannounced;
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delay = MAX(delay, MIN_DELAY);
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if (delay > MAX_CYCLES) {
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last_load = MAX_CYCLES;
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} else {
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last_load = delay;
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}
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}
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val2 = SysTick->VAL;
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SysTick->LOAD = last_load - 1;
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SysTick->VAL = 0; /* resets timer to last_load */
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/*
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* Add elapsed cycles while computing the new load to cycle_count.
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*
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* Note that comparing val1 and val2 is normaly not good enough to
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* guess if the counter wrapped during this interval. Indeed if val1 is
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* close to LOAD, then there are little chances to catch val2 between
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* val1 and LOAD after a wrap. COUNTFLAG should be checked in addition.
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* But since the load computation is faster than MIN_DELAY, then we
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* don't need to worry about this case.
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*/
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if (val1 < val2) {
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cycle_count += (val1 + (last_load_ - val2));
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} else {
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cycle_count += (val1 - val2);
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}
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k_spin_unlock(&lock, key);
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#endif
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}
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uint32_t sys_clock_elapsed(void)
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{
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if (!TICKLESS) {
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return 0;
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}
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint32_t cyc = elapsed() + cycle_count - announced_cycles;
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k_spin_unlock(&lock, key);
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return cyc / CYC_PER_TICK;
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}
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uint32_t sys_clock_cycle_get_32(void)
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{
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint32_t ret = elapsed() + cycle_count;
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k_spin_unlock(&lock, key);
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return ret;
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}
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void sys_clock_idle_exit(void)
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{
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if (last_load == TIMER_STOPPED) {
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SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
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}
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}
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void sys_clock_disable(void)
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{
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SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
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}
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static int sys_clock_driver_init(const struct device *dev)
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{
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ARG_UNUSED(dev);
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NVIC_SetPriority(SysTick_IRQn, _IRQ_PRIO_OFFSET);
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last_load = CYC_PER_TICK - 1;
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overflow_cyc = 0U;
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SysTick->LOAD = last_load;
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SysTick->VAL = 0; /* resets timer to last_load */
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SysTick->CTRL |= (SysTick_CTRL_ENABLE_Msk |
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SysTick_CTRL_TICKINT_Msk |
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SysTick_CTRL_CLKSOURCE_Msk);
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return 0;
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}
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SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2,
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CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
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