76 lines
2.3 KiB
Plaintext
76 lines
2.3 KiB
Plaintext
# NPCX eSPI driver configuration options
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# Copyright (c) 2020 Nuvoton Technology Corporation.
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# SPDX-License-Identifier: Apache-2.0
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config ESPI_NPCX
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bool "Nuvoton NPCX embedded controller (EC) ESPI driver"
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depends on SOC_FAMILY_NPCX
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help
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This option enables the Intel Enhanced Serial Peripheral Interface
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(eSPI) for NPCX family of processors.
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config ESPI_NPCX_PERIPHERAL_ACPI_SHD_MEM_SIZE
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int "Host I/O peripheral port size for shared memory in npcx series"
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depends on ESPI_NPCX || ESPI_PERIPHERAL_ACPI_SHM_REGION
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default 256
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help
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This is the port size used by the Host and EC to communicate over
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the shared memory region to return the ACPI response data. Please
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notice the valid value in npcx ec series for this option is 8/16/32/
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64/128/256/512/1024/2048/4096 bytes.
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config ESPI_NPCX_PERIPHERAL_HOST_CMD_PARAM_SIZE
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int "Host I/O peripheral port size for ec host command in npcx series"
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depends on ESPI_NPCX || ESPI_PERIPHERAL_EC_HOST_CMD
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default 256
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help
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This is the port size used by the Host and EC to communicate over
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the shared memory region to return the host command parameter data.
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Please notice the valid value in npcx ec series for this option is
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8/16/32/64/128/256/512/1024/2048/4096 bytes.
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config ESPI_NPCX_BYPASS_CH_ENABLE_FATAL_ERROR
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bool
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depends on SOC_SERIES_NPCX7 || SOC_SERIES_NPCX9
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default y
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help
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Workaround the issue documented in NPCX99nF errata rev1_2, No.3.10.
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Enabling an eSPI channel during an eSPI transaction might
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(with low probability) cause the eSPI_SIF module to transition to
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a wrong state and therefore response with FATAL_ERROR on an incoming
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transaction.
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config ESPI_NPCX_PERIPHERAL_DEBUG_PORT_80_MULTI_BYTE
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bool "Host can write 1/2/4 bytes of Port80 data in a eSPI transaction"
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depends on SOC_SERIES_NPCX9 && ESPI_PERIPHERAL_DEBUG_PORT_80
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help
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EC can accept 1/2/4 bytes of Port 80 data written from the Host in an
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eSPI transaction.
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# The default value 'y' for the existing options if ESPI_NPCX is selected.
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if ESPI_NPCX
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config ESPI_OOB_CHANNEL
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default y
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config ESPI_PERIPHERAL_8042_KBC
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default y
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config ESPI_PERIPHERAL_HOST_IO
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default y
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config ESPI_PERIPHERAL_DEBUG_PORT_80
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default y
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config ESPI_PERIPHERAL_EC_HOST_CMD
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default y
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config ESPI_PERIPHERAL_ACPI_SHM_REGION
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default y
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config ESPI_PERIPHERAL_CUSTOM_OPCODE
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default y
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endif #ESPI_NPCX
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