zephyr/soc/silabs
Michael Zimmermann d49cc8a56f drivers: clock_control: Add initial SiM3U1xx support
This serves two main purposes:
- change the CPU clock via devicetree nodes
- provide the APB frequency to device drivers via the clock driver
  interface

Theoretically this could also support choosing between the available
clock sources, but right now we only support LPOSC0 going into PLL0,
going into AHB.

Turning the PLL back off is also not supported since the only current
use case is to set the PLL frequency, turn it on, and switch the AHB
over to it.

Signed-off-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net>
2024-08-26 18:51:36 +02:00
..
common soc: silabs: Fix CMake test for soc family 2024-06-13 16:42:50 -04:00
silabs_s0 soc: silabs: Simplify logic 2024-08-26 18:51:36 +02:00
silabs_s1 soc: silabs: Simplify logic 2024-08-26 18:51:36 +02:00
silabs_s2 soc: silabs: Simplify logic 2024-08-26 18:51:36 +02:00
silabs_sim3 drivers: clock_control: Add initial SiM3U1xx support 2024-08-26 18:51:36 +02:00
CMakeLists.txt soc: Add initial SiM3U1xx support 2024-08-26 18:51:36 +02:00
Kconfig soc: silabs: Simplify logic 2024-08-26 18:51:36 +02:00
Kconfig.defconfig
Kconfig.soc soc: Add initial SiM3U1xx support 2024-08-26 18:51:36 +02:00
soc.yml soc: Add initial SiM3U1xx support 2024-08-26 18:51:36 +02:00