zephyr/boards/arm/bl5340_dvk/bl5340_dvk_cpunet-pinctrl.dtsi

27 lines
495 B
Plaintext

/*
* Copyright (c) 2022 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 8)>,
<NRF_PSEL(UART_RX, 1, 10)>,
<NRF_PSEL(UART_RTS, 1, 7)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 8)>,
<NRF_PSEL(UART_RX, 1, 10)>,
<NRF_PSEL(UART_RTS, 1, 7)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
low-power-enable;
};
};
};