zephyr/boards/arm/bl5340_dvk/Kconfig

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# BL5340-DVK board configuration
# Copyright (c) 2019-2021 Nordic Semiconductor ASA
# Copyright (c) 2021-2023 Laird Connectivity
# SPDX-License-Identifier: Apache-2.0
if BOARD_BL5340_DVK_CPUAPP || BOARD_BL5340_DVK_CPUAPP_NS
config BOARD_ENABLE_DCDC_APP
bool "Application MCU DCDC converter"
select SOC_DCDC_NRF53X_APP
default y
config BOARD_ENABLE_DCDC_NET
bool "Network MCU DCDC converter"
select SOC_DCDC_NRF53X_NET
default y
config BOARD_ENABLE_DCDC_HV
bool "High Voltage DCDC converter"
select SOC_DCDC_NRF53X_HV
default y
config BOARD_ENABLE_CPUNET
bool "NRF53 Network MCU"
select SOC_NRF_GPIO_FORWARDER_FOR_NRF5340 if \
$(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_GPIO_FORWARDER))
help
This option enables releasing the Network 'force off' signal, which
as a consequence will power up the Network MCU during system boot.
Additionally, the option allocates GPIO pins that will be used by UARTE
of the Network MCU.
Note: GPIO pin allocation can only be configured by the secure Application
MCU firmware, so when this option is used with the non-secure version of
the board, the application needs to take into consideration, that the
secure firmware image must already have configured GPIO allocation for the
Network MCU.
default y if (BT || NRF_802154_SER_HOST)
config DOMAIN_CPUNET_BOARD
string
default "bl5340_dvk_cpunet" if BOARD_BL5340_DVK_CPUAPP || BOARD_BL5340_DVK_CPUAPP_NS
depends on BOARD_ENABLE_CPUNET
help
The board which will be used for CPUNET domain when creating a multi
image application where one or more images should be located on
another board. For example hci_ipc on the bl5340_dvk_cpunet for
Bluetooth applications.
endif # BOARD_BL5340_DVK_CPUAPP || BOARD_BL5340_DVK_CPUAPP_NS
if BOARD_BL5340_DVK_CPUNET
config DOMAIN_CPUAPP_BOARD
string
default "bl5340_dvk_cpuapp" if BOARD_BL5340_DVK_CPUNET
help
The board which will be used for CPUAPP domain when creating a multi
image application where one or more images should be located on
another board.
endif # BOARD_BL5340_DVK_CPUNET