81 lines
2.2 KiB
YAML
81 lines
2.2 KiB
YAML
# Copyright (c) 2020 Abram Early
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Microchip MCP251XFD SPI CAN FD controller
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The MCP251XFD node is defined on an SPI bus. An example
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configuration is:
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&mikrobus_spi {
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cs-gpios = <&mikrobus_header 2 GPIO_ACTIVE_LOW>;
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mcp2518fd_mikroe_mcp2518fd_click: mcp2518fd@0 {
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compatible = "microchip,mcp251xfd";
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status = "okay";
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spi-max-frequency = <18000000>;
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int-gpios = <&mikrobus_header 7 GPIO_ACTIVE_LOW>;
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reg = <0x0>;
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osc-freq = <40000000>;
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bus-speed = <125000>;
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sample-point = <875>;
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bus-speed-data = <1000000>;
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sample-point-data = <875>;
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};
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};
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compatible: "microchip,mcp251xfd"
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include: [spi-device.yaml, can-fd-controller.yaml]
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properties:
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osc-freq:
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type: int
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required: true
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description: Frequency of the external oscillator in Hz.
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int-gpios:
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type: phandle-array
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required: true
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description: |
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The interrupt signal from the controller is active low in push-pull mode.
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The property value should ensure the flags properly describe the signal
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that is presented to the driver.
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pll-enable:
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type: boolean
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description: |
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Enables controller PLL, which multiples input clock frequency x10.
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This parameter also implicity sets whether the clock is from the PLL
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output or directly from the oscillator.
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If this option is enabled the clock source is the PLL, otherwise its
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the oscillator.
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timestamp-prescaler:
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type: int
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default: 1
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description: |
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Prescaler value for computing the timestamps of received messages.
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The timestamp counter is derived from the internal clock divided by this value.
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Valid range is [1, 1024].
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sof-on-clko:
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type: boolean
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description: |
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Output start-of-frame (SOF) signal on the CLKO pin every time
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a Start bit of a CAN message is transmitted or received. If this option
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is not set, then an internal clock (typically 40MHz or 20MHz) will be
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output on CLKO pin instead.
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clko-div:
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type: int
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description: The factor to divide the system clock for CLKO pin.
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default: 10
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enum:
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- 1
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- 2
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- 4
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- 10
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