bc69500b0e
Add support for specifying the domain/kernel clock along with a common clock divider for the STM32H7 CAN controller driver via devicetree. Previously, the driver only supported using the PLL1_Q clock for domain/kernel clock, but now the driver defaults to the HSE clock, which is the chip default. Update existing boards to continue to use the PLL1_Q clock. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com> |
||
|---|---|---|
| .. | ||
| atmel,sam-can.yaml | ||
| atmel,sam0-can.yaml | ||
| bosch,m_can-base.yaml | ||
| can-controller.yaml | ||
| can-fd-controller.yaml | ||
| espressif,esp32-twai.yaml | ||
| kvaser,pcican.yaml | ||
| microchip,mcp251xfd.yaml | ||
| microchip,mcp2515.yaml | ||
| nuvoton,numaker-canfd.yaml | ||
| nxp,flexcan-fd.yaml | ||
| nxp,flexcan.yaml | ||
| nxp,lpc-mcan.yaml | ||
| nxp,s32-canxl.yaml | ||
| renesas,rcar-can.yaml | ||
| st,stm32-bxcan.yaml | ||
| st,stm32-fdcan.yaml | ||
| st,stm32h7-fdcan.yaml | ||
| ti,tcan4x5x.yaml | ||
| zephyr,can-loopback.yaml | ||
| zephyr,fake-can.yaml | ||
| zephyr,native-linux-can.yaml | ||