zephyr/arch/xtensa/core
Flavio Ceolin 8356ec21e5 xtensa: mmu: Fix mmu initialization
The constant used to calculate TLB entries for the way six was wrong
and causing an integer overflow. Consequently only the first 512MB where
being unmapped from the TLB.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2024-01-11 10:05:22 +01:00
..
offsets xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
startup xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
CMakeLists.txt xtensa: rename xtensa_asm2.c to vector_handlers.c 2023-12-13 09:41:24 +01:00
README_MMU.txt xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
README_WINDOWS.rst xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
coredump.c xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
cpu_idle.c arch/xtensa: clean up arch_cpu_idle function 2023-11-20 11:14:41 +01:00
crt1.S xtensa: mmu: Simplify initialization 2023-11-21 15:49:48 +01:00
debug_helpers_asm.S xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
elf.c llext: merge llext_mem and llext_section enums 2023-12-14 19:06:55 +00:00
fatal.c arch: guard more code with CONFIG_EXCEPTION_DEBUG 2023-12-14 09:32:27 +01:00
gdbstub.c xtensa: rename z_xtensa_irq to simple xtensa_irq 2023-12-13 09:41:24 +01:00
gen_zsr.py xtensa: mmu: allocate scratch registers for MMU 2023-11-21 15:49:48 +01:00
irq_manage.c xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
irq_offload.c
mem_manage.c
mmu.c xtensa: mmu: Fix mmu initialization 2024-01-11 10:05:22 +01:00
ptables.c xtensa: mmu: invalidate mem domain TLBs during page table swap 2023-12-27 15:59:05 +00:00
smp.c xtensa: move arch_spin_relax into smp.c 2023-12-13 09:41:24 +01:00
syscall_helper.c xtensa: userspace: simplify syscall helper 2023-11-21 15:49:48 +01:00
thread.c xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
timing.c
tls.c
userspace.S xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
vector_handlers.c xtensa: rename xtensa_asm2.c to vector_handlers.c 2023-12-13 09:41:24 +01:00
window_vectors.S arch/xtensa: Rename "ALLOCA" ZSR to "A0SAVE" 2023-11-21 15:49:48 +01:00
xcc_stubs.c
xtensa_asm2_util.S xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
xtensa_backtrace.c xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
xtensa_intgen.py
xtensa_intgen.tmpl