365 lines
10 KiB
C
365 lines
10 KiB
C
/*
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* Copyright (c) 2018 Cypress
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT cypress_psoc6_uart
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/** @file
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* @brief UART driver for Cypress PSoC6 MCU family.
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*
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* Note:
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* - Error handling is not implemented.
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* - The driver works only in polling mode, interrupt mode is not implemented.
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*/
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#include <zephyr/device.h>
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#include <errno.h>
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#include <zephyr/init.h>
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#include <zephyr/sys/__assert.h>
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#include <soc.h>
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#include <zephyr/drivers/uart.h>
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#include "cy_syslib.h"
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#include "cy_sysclk.h"
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#include "cy_scb_uart.h"
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#include "cy_sysint.h"
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/* UART desired baud rate is 115200 bps (Standard mode).
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* The UART baud rate = (SCB clock frequency / Oversample).
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* For PeriClk = 50 MHz, select divider value 36 and get
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* SCB clock = (50 MHz / 36) = 1,389 MHz.
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* Select Oversample = 12.
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* These setting results UART data rate = 1,389 MHz / 12 = 115750 bps.
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*/
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#define UART_PSOC6_CONFIG_OVERSAMPLE (12UL)
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#define UART_PSOC6_CONFIG_BREAKWIDTH (11UL)
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#define UART_PSOC6_CONFIG_DATAWIDTH (8UL)
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/* Assign divider type and number for UART */
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#define UART_PSOC6_UART_CLK_DIV_TYPE (CY_SYSCLK_DIV_8_BIT)
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#define UART_PSOC6_UART_CLK_DIV_NUMBER (PERI_DIV_8_NR - 1u)
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#define UART_PSOC6_UART_CLK_DIV_VAL (35UL)
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/*
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* Verify Kconfig configuration
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*/
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struct cypress_psoc6_config {
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CySCB_Type *base;
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uint32_t periph_id;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_config_func_t irq_config_func;
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#endif
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uint32_t num_pins;
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struct soc_gpio_pin pins[];
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};
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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struct cypress_psoc6_data {
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uart_irq_callback_user_data_t irq_cb; /* Interrupt Callback */
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void *irq_cb_data; /* Interrupt Callback Arg */
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};
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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/* Populate configuration structure */
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static const cy_stc_scb_uart_config_t uartConfig = {
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.uartMode = CY_SCB_UART_STANDARD,
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.enableMutliProcessorMode = false,
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.smartCardRetryOnNack = false,
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.irdaInvertRx = false,
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.irdaEnableLowPowerReceiver = false,
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.oversample = UART_PSOC6_CONFIG_OVERSAMPLE,
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.enableMsbFirst = false,
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.dataWidth = UART_PSOC6_CONFIG_DATAWIDTH,
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.parity = CY_SCB_UART_PARITY_NONE,
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.stopBits = CY_SCB_UART_STOP_BITS_1,
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.enableInputFilter = false,
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.breakWidth = UART_PSOC6_CONFIG_BREAKWIDTH,
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.dropOnFrameError = false,
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.dropOnParityError = false,
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.receiverAddress = 0UL,
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.receiverAddressMask = 0UL,
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.acceptAddrInFifo = false,
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.enableCts = false,
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.ctsPolarity = CY_SCB_UART_ACTIVE_LOW,
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.rtsRxFifoLevel = 0UL,
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.rtsPolarity = CY_SCB_UART_ACTIVE_LOW,
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.rxFifoTriggerLevel = 0UL,
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.rxFifoIntEnableMask = 0UL,
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.txFifoTriggerLevel = 0UL,
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.txFifoIntEnableMask = 0UL,
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};
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/**
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* Function Name: uart_psoc6_init()
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*
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* Performs hardware initialization: debug UART.
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*
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*/
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static int uart_psoc6_init(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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soc_gpio_list_configure(config->pins, config->num_pins);
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/* Connect assigned divider to be a clock source for UART */
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Cy_SysClk_PeriphAssignDivider(config->periph_id,
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UART_PSOC6_UART_CLK_DIV_TYPE,
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UART_PSOC6_UART_CLK_DIV_NUMBER);
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Cy_SysClk_PeriphSetDivider(UART_PSOC6_UART_CLK_DIV_TYPE,
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UART_PSOC6_UART_CLK_DIV_NUMBER,
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UART_PSOC6_UART_CLK_DIV_VAL);
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Cy_SysClk_PeriphEnableDivider(UART_PSOC6_UART_CLK_DIV_TYPE,
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UART_PSOC6_UART_CLK_DIV_NUMBER);
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/* Configure UART to operate */
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(void) Cy_SCB_UART_Init(config->base, &uartConfig, NULL);
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Cy_SCB_UART_Enable(config->base);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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config->irq_config_func(dev);
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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return 0;
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}
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static int uart_psoc6_poll_in(const struct device *dev, unsigned char *c)
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{
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const struct cypress_psoc6_config *config = dev->config;
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uint32_t rec;
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rec = Cy_SCB_UART_Get(config->base);
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*c = (unsigned char)(rec & 0xff);
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return ((rec == CY_SCB_UART_RX_NO_DATA) ? -1 : 0);
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}
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static void uart_psoc6_poll_out(const struct device *dev, unsigned char c)
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{
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const struct cypress_psoc6_config *config = dev->config;
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while (Cy_SCB_UART_Put(config->base, (uint32_t)c) != 1UL) {
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}
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}
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static int uart_psoc6_err_check(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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uint32_t status = Cy_SCB_UART_GetRxFifoStatus(config->base);
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int errors = 0;
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if (status & CY_SCB_UART_RX_OVERFLOW) {
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errors |= UART_ERROR_OVERRUN;
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}
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if (status & CY_SCB_UART_RX_ERR_PARITY) {
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errors |= UART_ERROR_PARITY;
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}
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if (status & CY_SCB_UART_RX_ERR_FRAME) {
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errors |= UART_ERROR_FRAMING;
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}
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return errors;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int uart_psoc6_fifo_fill(const struct device *dev,
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const uint8_t *tx_data,
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int size)
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{
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const struct cypress_psoc6_config *config = dev->config;
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return Cy_SCB_UART_PutArray(config->base, (uint8_t *) tx_data, size);
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}
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static int uart_psoc6_fifo_read(const struct device *dev,
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uint8_t *rx_data,
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const int size)
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{
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const struct cypress_psoc6_config *config = dev->config;
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return Cy_SCB_UART_GetArray(config->base, rx_data, size);
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}
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static void uart_psoc6_irq_tx_enable(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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Cy_SCB_SetTxInterruptMask(config->base, CY_SCB_UART_TX_EMPTY);
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}
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static void uart_psoc6_irq_tx_disable(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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Cy_SCB_SetTxInterruptMask(config->base, 0);
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}
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static int uart_psoc6_irq_tx_ready(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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uint32_t status = Cy_SCB_UART_GetTxFifoStatus(config->base);
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Cy_SCB_UART_ClearTxFifoStatus(config->base, CY_SCB_UART_TX_INTR_MASK);
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return (status & CY_SCB_UART_TX_NOT_FULL);
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}
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static int uart_psoc6_irq_tx_complete(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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uint32_t status = Cy_SCB_UART_GetTxFifoStatus(config->base);
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Cy_SCB_UART_ClearTxFifoStatus(config->base, CY_SCB_UART_TX_INTR_MASK);
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return (status & CY_SCB_UART_TX_DONE);
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}
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static void uart_psoc6_irq_rx_enable(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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Cy_SCB_SetRxInterruptMask(config->base, CY_SCB_UART_RX_NOT_EMPTY);
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}
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static void uart_psoc6_irq_rx_disable(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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Cy_SCB_SetRxInterruptMask(config->base, 0);
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}
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static int uart_psoc6_irq_rx_ready(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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uint32_t status = Cy_SCB_UART_GetRxFifoStatus(config->base);
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Cy_SCB_UART_ClearRxFifoStatus(config->base, CY_SCB_UART_RX_INTR_MASK);
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return (status & CY_SCB_UART_RX_NOT_EMPTY);
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}
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static void uart_psoc6_irq_err_enable(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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uint32_t intmask = Cy_SCB_GetRxInterruptMask(config->base) |
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CY_SCB_UART_RECEIVE_ERR;
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Cy_SCB_SetRxInterruptMask(config->base, intmask);
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}
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static void uart_psoc6_irq_err_disable(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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uint32_t intmask = Cy_SCB_GetRxInterruptMask(config->base) &
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~(CY_SCB_UART_RECEIVE_ERR);
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Cy_SCB_SetRxInterruptMask(config->base, intmask);
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}
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static int uart_psoc6_irq_is_pending(const struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config;
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uint32_t intcause = Cy_SCB_GetInterruptCause(config->base);
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return (intcause & (CY_SCB_TX_INTR | CY_SCB_RX_INTR));
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}
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static int uart_psoc6_irq_update(const struct device *dev)
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{
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ARG_UNUSED(dev);
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return 1;
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}
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static void uart_psoc6_irq_callback_set(const struct device *dev,
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uart_irq_callback_user_data_t cb,
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void *cb_data)
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{
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struct cypress_psoc6_data *const dev_data = dev->data;
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dev_data->irq_cb = cb;
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dev_data->irq_cb_data = cb_data;
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}
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static void uart_psoc6_isr(const struct device *dev)
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{
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struct cypress_psoc6_data *const dev_data = dev->data;
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if (dev_data->irq_cb) {
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dev_data->irq_cb(dev, dev_data->irq_cb_data);
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}
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static const struct uart_driver_api uart_psoc6_driver_api = {
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.poll_in = uart_psoc6_poll_in,
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.poll_out = uart_psoc6_poll_out,
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.err_check = uart_psoc6_err_check,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_fill = uart_psoc6_fifo_fill,
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.fifo_read = uart_psoc6_fifo_read,
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.irq_tx_enable = uart_psoc6_irq_tx_enable,
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.irq_tx_disable = uart_psoc6_irq_tx_disable,
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.irq_tx_ready = uart_psoc6_irq_tx_ready,
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.irq_rx_enable = uart_psoc6_irq_rx_enable,
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.irq_rx_disable = uart_psoc6_irq_rx_disable,
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.irq_tx_complete = uart_psoc6_irq_tx_complete,
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.irq_rx_ready = uart_psoc6_irq_rx_ready,
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.irq_err_enable = uart_psoc6_irq_err_enable,
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.irq_err_disable = uart_psoc6_irq_err_disable,
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.irq_is_pending = uart_psoc6_irq_is_pending,
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.irq_update = uart_psoc6_irq_update,
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.irq_callback_set = uart_psoc6_irq_callback_set,
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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#define CY_PSOC6_UART_IRQ_FUNC(n) \
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static void cy_psoc6_uart##n##_irq_config(const struct device *port) \
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{ \
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CY_PSOC6_DT_INST_NVIC_INSTALL(n, \
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uart_psoc6_isr); \
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};
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#define CY_PSOC6_UART_IRQ_SET_FUNC(n) \
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.irq_config_func = cy_psoc6_uart##n##_irq_config
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#define CY_PSOC6_UART_DECL_DATA(n) \
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static struct cypress_psoc6_data cy_psoc6_uart##n##_data = { 0 };
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#define CY_PSOC6_UART_DECL_DATA_PTR(n) &cy_psoc6_uart##n##_data
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#else
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#define CY_PSOC6_UART_IRQ_FUNC(n)
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#define CY_PSOC6_UART_IRQ_SET_FUNC(n)
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#define CY_PSOC6_UART_DECL_DATA(n)
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#define CY_PSOC6_UART_DECL_DATA_PTR(n) NULL
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#endif
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#define CY_PSOC6_UART_INIT(n) \
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CY_PSOC6_UART_DECL_DATA(n) \
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CY_PSOC6_UART_IRQ_FUNC(n) \
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static const struct cypress_psoc6_config cy_psoc6_uart##n##_config = { \
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.base = (CySCB_Type *)DT_INST_REG_ADDR(n), \
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.periph_id = DT_INST_PROP(n, peripheral_id), \
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\
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.num_pins = CY_PSOC6_DT_INST_NUM_PINS(n), \
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.pins = CY_PSOC6_DT_INST_PINS(n), \
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\
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CY_PSOC6_UART_IRQ_SET_FUNC(n) \
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}; \
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DEVICE_DT_INST_DEFINE(n, &uart_psoc6_init, NULL, \
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CY_PSOC6_UART_DECL_DATA_PTR(n), \
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&cy_psoc6_uart##n##_config, PRE_KERNEL_1, \
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CONFIG_SERIAL_INIT_PRIORITY, \
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&uart_psoc6_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(CY_PSOC6_UART_INIT)
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