zephyr/dts/riscv
Olof Johansson f847742c77 dts: bindings: riscv: Don't use riscv, prefix for vendor compat
In 8f9290d274 ('dts: bindings: riscv: Add and use bindings for
sifive CPUs'), new compat strings for SiFive CPUs were added, but with
riscv prefixes. Vendor-specific compats should just be prefixed with the
vendor, so move that over here.

Fixes: 8f9290d274 ('dts: bindings: riscv: Add and use bindings
  for sifive CPUs')
Signed-off-by: Olof Johansson <olof@lixom.net>
2022-06-16 11:26:25 +02:00
..
andes
espressif esp32/s2/c3: pinctrl: dts: move pinctrl node out of SoC bus 2022-05-13 11:25:58 -07:00
gigadevice
ite dts: add reg-shift property to all ns16550 devices 2022-06-15 16:59:02 -05:00
microsemi
openisa dts: riscv: openisa: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
sifive dts: bindings: riscv: Don't use riscv, prefix for vendor compat 2022-06-16 11:26:25 +02:00
starfive
telink dts: riscv: telink: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
mpfs-icicle.dtsi
neorv32.dtsi
riscv32-litex-vexriscv.dtsi dts: riscv: litex-vexriscv: Fix clock node address 2022-05-27 15:27:11 -07:00
virt.dtsi