zephyr/boards/x86
Keith Packard d0c75f3b96 lib/libc: Add picolibc support (aarch32, aarch64 and RISC-V) [v21]
Picolibc is a fork of newlib designed and tested on embedded systems. It
offers a smaller memory footprint (both ROM and RAM), and native TLS
support, which uses the Zephyr TLS support.

By default, the full printf version is included in the executable, which
includes exact floating point and long long input and output. A
configuration option has been added to switch to the integer-only
version (which also omits long long support).

Here are some size comparisons using qemu-cortex-m3 and this application
(parameters passed to printf to avoid GCC optimizing it into puts):

void main(void)
{
    printf("Hello World! %s %d\n", CONFIG_BOARD, 12);
}

                       FLASH    SRAM
    minimal             8696    3952
    picolibc int        7600    3960
    picolibc float     12304    3960
    newlib-nano int    11696    4128
    newlib-nano float  30516    4496
    newlib             34800    6112

---

v2:
	Include picolibc-tls.ld

v3:
	Document usage in guides/c_library.rst and
	getting_started/toolchain_other_x_compilers.rst

v4:
	Lost the lib/libc/picolibc directory somehow!

v5:
	Add PICOLIBC_ALIGNED_HEAP_SIZE configuration option.
	Delete PICOLIBC_SEMIHOST option support code

v6:
	Don't allocate static RAM for TLS values; TLS
	values only need to be allocated for each thread.

v7:
	Use arm coprocessor for TLS pointer storage where supported for
	compatibility with the -mtp=cp15 compiler option (or when the
	target cpu type selects this option)

	Add a bunch of tests

	Round TLS segment up to stack alignment so that overall stack
	remains correctly aligned

	Add aarch64 support

	Rebase to upstream head

v8:
	Share NEWLIB, NEWLIB_NANO and PICOLIBC library configuration
	variables in a single LIBC_PARTITIONS variable instead of
	having separate PICOLIBC_PART and NEWLIB_PART variables.

v9:
	Update docs to reference pending sdk-ng support for picolibc

v10:
	Support memory protection by creating a partition for
	picolibc shared data and any pre-defined picolibc heap.

v11:
	Fix formatting in arch/arm/core/aarch64/switch.S

v12:
	Remove TLS support from this patch now that TLS is upstream
	Require THREAD_LOCAL_STORAGE when using PICOLIBC for architectures
	that support it.

v13:
	Merge errno changes as they're only needed for picolibc.
	Adapt cmake changes suggested by Torsten Tejlmand Rasmussen

v14:
	Update to picolibc 1.7 and newer (new stdin/stdout/stderr ABI)

v15:
	Respond to comments from dcpleung:
	* switch kernel/errno to use CONFIG_LIBC_ERRNO instead of
          CONFIG_PICOLIBC
	* Add comment to test/lib/sprintf as to why the %n test
	  was disabled for picolibc.

v16:
	Switch picolibc to a module built with Zephyr. This eliminates
	toolchain dependencies and allows compiler settings for Zephyr
	to also be applied to picolibc.

v17:
	Provide Zephyr-specific 'abort' implementation.
	Support systems with MMU

v18:
	Allow use of toolchain picolibc version.

v19:
	Use zephyr/ for zephyr headers

v20:
	Add locking
	Use explicit commit for picolibc module

v21:
	Create PICOLIBC_SUPPORTED config param. Set on arc, arm, arm64,
	mips and riscv architectures.

Signed-off-by: Keith Packard <keithp@keithp.com>
2022-06-22 13:15:55 +02:00
..
acrn dts: x86: intel: Move SoC devicetree includes under a vendor directory 2022-05-09 17:54:48 -04:00
common/scripts scripts: Allow use of bash outside of /bin 2022-03-08 11:11:10 +01:00
ehl_crb test: Enable the GPIO tests on EHL_CRB. 2022-06-21 10:47:56 +02:00
qemu_x86 lib/libc: Add picolibc support (aarch32, aarch64 and RISC-V) [v21] 2022-06-22 13:15:55 +02:00
up_squared dts: x86: intel: Move SoC devicetree includes under a vendor directory 2022-05-09 17:54:48 -04:00
index.rst