145 lines
3.3 KiB
C
145 lines
3.3 KiB
C
/*
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* Copyright 2021 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DRIVERS_CACHE_H_
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#define ZEPHYR_INCLUDE_DRIVERS_CACHE_H_
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#include <cache.h>
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/**
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*
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* @brief Enable d-cache
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*
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* Enable the d-cache.
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*
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* @return N/A
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*/
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void cache_data_enable(void);
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/**
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*
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* @brief Disable d-cache
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*
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* Disable the d-cache.
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*
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* @return N/A
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*/
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void cache_data_disable(void);
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/**
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*
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* @brief Enable i-cache
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*
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* Enable the i-cache.
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*
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* @return N/A
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*/
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void cache_instr_enable(void);
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/**
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*
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* @brief Disable i-cache
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*
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* Disable the i-cache.
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*
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* @return N/A
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*/
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void cache_instr_disable(void);
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/**
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*
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* @brief Write-back / Invalidate / Write-back + Invalidate all d-cache
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*
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* Write-back, Invalidate or Write-back + Invalidate the whole d-cache.
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*
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* @param op Operation to perform (one of the K_CACHE_* operations)
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*
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* @retval 0 On success
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* @retval -ENOTSUP If the operation is not supported
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*/
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int cache_data_all(int op);
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/**
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*
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* @brief Write-back / Invalidate / Write-back + Invalidate d-cache lines
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*
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* No alignment is required for either addr or size, but since
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* arch_dcache_range() iterates on the d-cache lines, a d-cache line alignment
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* for both is optimal.
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*
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* The d-cache line size is specified either via the CONFIG_DCACHE_LINE_SIZE
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* kconfig option or it is detected at runtime.
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*
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* @param addr The pointer to start the multi-line operation
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* @param size The number of bytes that are to be acted on
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* @param op Operation to perform (one of the K_CACHE_* operations)
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*
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* @retval 0 On success
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* @retval -ENOTSUP If the operation is not supported
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*/
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int cache_data_range(void *addr, size_t size, int op);
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/**
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*
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* @brief Write-back / Invalidate / Write-back + Invalidate all i-cache
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*
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* Write-back, Invalidate or Write-back + Invalidate the whole i-cache.
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*
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* @param op Operation to perform (one of the K_CACHE_* operations)
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*
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* @retval 0 On success
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* @retval -ENOTSUP If the operation is not supported
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*/
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int cache_instr_all(int op);
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/**
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*
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* @brief Write-back / Invalidate / Write-back + Invalidate i-cache lines
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*
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* No alignment is required for either addr or size, but since
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* arch_icache_range() iterates on the i-cache lines, an i-cache line alignment
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* for both is optimal.
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*
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* The i-cache line size is specified either via the CONFIG_ICACHE_LINE_SIZE
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* kconfig option or it is detected at runtime.
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*
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* @param addr The pointer to start the multi-line operation
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* @param size The number of bytes that are to be acted on
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* @param op Operation to perform (one of the K_CACHE_* operations)
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*
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* @retval 0 On success
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* @retval -ENOTSUP If the operation is not supported
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*/
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int cache_instr_range(void *addr, size_t size, int op);
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#ifdef CONFIG_DCACHE_LINE_SIZE_DETECT
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/**
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*
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* @brief Get the i-cache line size.
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*
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* The API is provided to get the i-cache line size.
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*
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* @return size of the i-cache line or 0 if the i-cache is not enabled.
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*/
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size_t cache_data_line_size_get(void);
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#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
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#ifdef CONFIG_ICACHE_LINE_SIZE_DETECT
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/**
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*
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* @brief Get the i-cache line size.
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*
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* The API is provided to get the i-cache line size.
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*
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* @return size of the i-cache line or 0 if the i-cache is not enabled.
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*/
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size_t cache_instr_line_size_get(void);
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#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */
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#endif /* ZEPHYR_INCLUDE_DRIVERS_CACHE_H_ */
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