44 lines
929 B
Plaintext
44 lines
929 B
Plaintext
CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F412CG=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 84MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
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CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
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# enable uart driver
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CONFIG_SERIAL=y
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# enable pinmux
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CONFIG_PINMUX=y
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# enable GPIO
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CONFIG_GPIO=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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# SYSCLK selection
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# PLL configuration
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CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
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CONFIG_CLOCK_STM32_HSE_CLOCK=16000000
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# produce 84MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=84
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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# APB1 clock must not exceed 50MHz limit
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# APB2 clock is fixed at 42MHz to prevent known SPI/I2S bug
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CONFIG_CLOCK_STM32_APB1_PRESCALER=2
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CONFIG_CLOCK_STM32_APB2_PRESCALER=2
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# console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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