111 lines
2.1 KiB
Plaintext
111 lines
2.1 KiB
Plaintext
#include <arm/armv7-m.dtsi>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <nordic/mem.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4";
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reg = <0>;
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};
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};
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flash-controller@4001E000 {
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compatible = "nrf,nrf52-flash-controller";
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reg = <0x4001E000 0x550>;
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#address-cells = <1>;
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#size-cells = <1>;
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label="NRF_FLASH_DRV_NAME";
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "NRF_FLASH";
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reg = <0x00000000 DT_FLASH_SIZE>;
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write-block-size = <4>;
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};
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x20000000 DT_SRAM_SIZE>;
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};
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soc {
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adc: adc@40007000 {
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compatible = "nordic,nrf-saadc";
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reg = <0x40007000 0x1000>;
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interrupts = <7 1>;
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status = "disabled";
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label = "ADC_0";
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};
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uart0: uart@40002000 {
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compatible = "nordic,nrf-uarte";
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reg = <0x40002000 0x1000>;
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interrupts = <2 1>;
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status = "disabled";
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label = "UART_0";
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};
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gpiote: gpiote@40006000 {
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compatible = "nordic,nrf-gpiote";
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reg = <0x40006000 0x1000>;
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interrupts = <6 5>;
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interrupt-names = "gpiote";
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status = "disabled";
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label = "GPIOTE_0";
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};
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gpio0: gpio@50000000 {
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compatible = "nordic,nrf-gpio";
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gpio-controller;
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reg = <0x50000000 0x200
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0x50000500 0x300>;
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#gpio-cells = <2>;
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label = "GPIO_0";
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status = "disabled";
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};
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i2c0: i2c@40003000 {
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compatible = "nordic,nrf-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003000 0x1000>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <3 1>;
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status = "disabled";
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label = "I2C_0";
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};
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spi0: spi@40004000 {
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compatible = "nordic,nrf-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40004000 0x1000>;
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interrupts = <4 1>;
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status = "disabled";
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label = "SPI_0";
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};
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wdt: watchdog@40010000 {
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compatible = "nordic,nrf-watchdog";
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reg = <0x40010000 0x1000>;
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interrupts = <16 1>;
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interrupt-names = "wdt";
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label = "WDT";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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