680 lines
20 KiB
C
680 lines
20 KiB
C
/*
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* Copyright (c) 2020 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Definitions and helper macros for managing driver memory-mapped
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* input/output (MMIO) regions appropriately in either RAM or ROM.
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*
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* In most cases drivers will just want to include device.h, but
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* including this separately may be needed for arch-level driver code
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* which uses the DEVICE_MMIO_TOPLEVEL variants and including the
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* main device.h would introduce header dependency loops due to that
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* header's reliance on kernel.h.
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*/
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#ifndef ZEPHYR_INCLUDE_SYS_DEVICE_MMIO_H
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#define ZEPHYR_INCLUDE_SYS_DEVICE_MMIO_H
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#include <toolchain/common.h>
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#include <linker/sections.h>
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/**
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* @defgroup device-mmio Device memory-mapped IO management
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* @ingroup device-model
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* @{
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*/
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/* Storing MMIO addresses in RAM is a system-wide decision based on
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* configuration. This is just used to simplify some other definitions.
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*
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* If we have an MMU enabled, all physical MMIO regions must be mapped into
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* the kernel's virtual address space at runtime, this is a hard requirement.
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*
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* If we have PCIE enabled, this does mean that non-PCIE drivers may waste
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* a bit of RAM, but systems with PCI express are not RAM constrained.
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*/
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#if defined(CONFIG_MMU) || defined(CONFIG_PCIE)
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#define DEVICE_MMIO_IS_IN_RAM
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#endif
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#ifndef _ASMLANGUAGE
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#include <stdint.h>
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#include <stddef.h>
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#include <sys/mem_manage.h>
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#include <sys/sys_io.h>
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#ifdef DEVICE_MMIO_IS_IN_RAM
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/* Store the physical address and size from DTS, we'll memory
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* map into the virtual address space at runtime. This is not applicable
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* to PCIe devices, which must query the bus for BAR information.
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*/
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struct z_device_mmio_rom {
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/** MMIO physical address */
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uintptr_t phys_addr;
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/** MMIO region size */
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size_t size;
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};
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#define Z_DEVICE_MMIO_ROM_INITIALIZER(node_id) \
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{ \
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.phys_addr = DT_REG_ADDR(node_id), \
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.size = DT_REG_SIZE(node_id) \
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}
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/**
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* Set linear address for device MMIO access
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*
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* This function sets the `virt_addr` parameter to the correct linear
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* address for the MMIO region.
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*
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* If the MMU is enabled, mappings may be created in the page tables.
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*
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* Normally, only a caching mode needs to be set for the 'flags' parameter.
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* The mapped linear address will have read-write access to supervisor mode.
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*
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* @see k_map()
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*
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* @param virt_addr [out] Output linear address storage location, most
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* users will want some DEVICE_MMIO_RAM_PTR() value
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* @param phys_addr Physical address base of the MMIO region
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* @param size Size of the MMIO region
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* @param flags Caching mode and access flags, see K_MEM_CACHE_* and
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* K_MEM_PERM_* macros
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*/
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__boot_func
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static inline void device_map(mm_reg_t *virt_addr, uintptr_t phys_addr,
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size_t size, uint32_t flags)
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{
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#ifdef CONFIG_MMU
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/* Pass along flags and add that we want supervisor mode
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* read-write access.
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*/
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z_phys_map((uint8_t **)virt_addr, phys_addr, size,
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flags | K_MEM_PERM_RW);
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#else
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ARG_UNUSED(size);
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ARG_UNUSED(flags);
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*virt_addr = phys_addr;
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#endif /* CONFIG_MMU */
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}
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#else
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/* No MMU or PCIe. Just store the address from DTS and treat as a linear
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* address
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*/
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struct z_device_mmio_rom {
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/** MMIO linear address */
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mm_reg_t addr;
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};
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#define Z_DEVICE_MMIO_ROM_INITIALIZER(node_id) \
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{ \
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.addr = DT_REG_ADDR(node_id) \
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}
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#endif /* DEVICE_MMIO_IS_IN_RAM */
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#endif /* !_ASMLANGUAGE */
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/** @} */
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/**
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* @defgroup device-mmio-single Single MMIO region macros
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* @ingroup device-mmio
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*
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* For drivers which need to manage just one MMIO region, the most common
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* case.
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*
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* @{
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*/
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/**
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* @def DEVICE_MMIO_RAM
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*
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* Declare storage for MMIO information within a device's dev_data struct.
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*
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* This gets accessed by the DEVICE_MMIO_MAP() and DEVICE_MMIO_GET() macros.
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*
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* Depending on configuration, no memory may be reserved at all.
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* This must be the first member of the data struct.
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*
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* There must be a corresponding DEVICE_MMIO_ROM in config_info if the
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* physical address is known at build time, but may be omitted if not (such
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* as with PCIe)
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*
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* Example for a driver named "foo":
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*
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* struct foo_driver_data {
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* DEVICE_MMIO_RAM;
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* int wibble;
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* ...
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* }
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*
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* No build-time initialization of this memory is necessary; it
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* will be set up in the init function by DEVICE_MMIO_MAP().
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*
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* A pointer to this memory may be obtained with DEVICE_MMIO_RAM_PTR().
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*/
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#ifdef DEVICE_MMIO_IS_IN_RAM
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#define DEVICE_MMIO_RAM mm_reg_t _mmio
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#else
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#define DEVICE_MMIO_RAM
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#endif
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#ifdef DEVICE_MMIO_IS_IN_RAM
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/**
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* @def DEVICE_MMIO_RAM_PTR(device)
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*
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* Return a pointer to the RAM-based storage area for a device's MMIO
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* address.
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*
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* This is useful for the target MMIO address location when using
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* device_map() directly.
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*
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* @param device device node_id object
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* @retval mm_reg_t pointer to storage location
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*/
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#define DEVICE_MMIO_RAM_PTR(device) (mm_reg_t *)((device)->data)
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#endif /* DEVICE_MMIO_IS_IN_RAM */
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/**
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* @def DEVICE_MMIO_ROM
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*
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* @brief Declare storage for MMIO data within a device's config struct
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*
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* This gets accessed by DEVICE_MMIO_MAP() and DEVICE_MMIO_GET() macros.
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*
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* What gets stored here varies considerably by configuration.
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* This must be the first member of the config struct. There must be
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* a corresponding DEVICE_MMIO_RAM in data.
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*
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* This storage is not used if the device is PCIe and may be omitted.
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*
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* This should be initialized at build time with information from DTS
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* using DEVICE_MMIO_ROM_INIT().
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*
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* A pointer to this memory may be obtained with DEVICE_MMIO_ROM_PTR().
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*
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* Example for a driver named "foo":
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*
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* struct foo_config {
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* DEVICE_MMIO_ROM;
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* int baz;
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* ...
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* }
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*
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* @see DEVICE_MMIO_ROM_INIT()
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*/
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#define DEVICE_MMIO_ROM struct z_device_mmio_rom _mmio
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/**
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* @def DEVICE_MMIO_ROM_PTR(dev)
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*
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* Return a pointer to the ROM-based storage area for a device's MMIO
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* information. This macro will not work properly if the ROM storage
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* was omitted from the config struct declaration, and should not
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* be used in this case.
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*
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* @param dev device instance object
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* @retval struct device_mmio_rom * pointer to storage location
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*/
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#define DEVICE_MMIO_ROM_PTR(dev) \
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((struct z_device_mmio_rom *)((dev)->config))
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/**
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* @def DEVICE_MMIO_ROM_INIT(node_id)
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*
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* @brief Initialize a DEVICE_MMIO_ROM member
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*
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* Initialize MMIO-related information within a specific instance of
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* a device config struct, using information from DTS.
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*
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* Example for a driver belonging to the "foo" subsystem:
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*
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* struct foo_config my_config = {
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* DEVICE_MMIO_ROM_INIT(DT_DRV_INST(...)),
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* .baz = 2;
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* ...
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* }
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*
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* @see DEVICE_MMIO_ROM()
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*
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* @param node_id DTS node_id
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*/
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#define DEVICE_MMIO_ROM_INIT(node_id) \
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._mmio = Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
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/**
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* @def DEVICE_MMIO_MAP(device, flags)
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*
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* @brief Map MMIO memory into the address space
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*
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* This is not intended for PCIe devices; these must be probed at runtime
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* and you will want to make a device_map() call directly, using
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* DEVICE_MMIO_RAM_PTR() as the target virtual address location.
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*
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* The flags argument is currently used for caching mode, which should be
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* one of the DEVICE_CACHE_* macros. Unused bits are reserved for future
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* expansion.
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*
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* @param dev Device object instance
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* @param flags cache mode flags
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*/
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#ifdef DEVICE_MMIO_IS_IN_RAM
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#define DEVICE_MMIO_MAP(dev, flags) \
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device_map(DEVICE_MMIO_RAM_PTR(dev), \
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DEVICE_MMIO_ROM_PTR(dev)->phys_addr, \
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DEVICE_MMIO_ROM_PTR(dev)->size, \
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(flags))
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#else
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#define DEVICE_MMIO_MAP(dev, flags) do { } while (0)
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#endif
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/**
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* @def DEVICE_MMIO_GET(dev)
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*
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* @brief Obtain the MMIO address for a device
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*
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* For most microcontrollers MMIO addresses can be fixed values known at
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* build time, and we can store this in device->config, residing in ROM.
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*
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* However, some devices can only know their MMIO addresses at runtime,
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* because they need to be memory-mapped into the address space, enumerated
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* from PCI, or both.
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*
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* This macro returns the linear address of the driver's MMIO region.
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* This is for drivers which have exactly one MMIO region.
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* A call must have been made to device_map() in the driver init function.
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*
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* @param dev Device object
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* @return mm_reg_t linear address of the MMIO region
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*/
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#ifdef DEVICE_MMIO_IS_IN_RAM
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#define DEVICE_MMIO_GET(dev) (*DEVICE_MMIO_RAM_PTR(dev))
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#else
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#define DEVICE_MMIO_GET(dev) (DEVICE_MMIO_ROM_PTR(dev)->addr)
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#endif
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/** @} */
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/**
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* @defgroup device-mmio-named Named MMIO region macros
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* @ingroup device-mmio
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*
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* For drivers which need to manage multiple MMIO regions, which will
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* be referenced by name.
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*
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* @{
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*/
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/**
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* @def DEVICE_MMIO_NAMED_RAM(name)
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*
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* @brief Declare storage for MMIO data within a device's dev_data struct
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*
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* This gets accessed by the DEVICE_MMIO_NAMED_MAP() and
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* DEVICE_MMIO_NAMED_GET() macros.
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*
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* Depending on configuration, no memory may be reserved at all.
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* Multiple named regions may be declared.
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*
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* There must be a corresponding DEVICE_MMIO_ROM in config if the
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* physical address is known at build time, but may be omitted if not (such
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* as with PCIe.
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*
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* Example for a driver named "foo":
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*
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* struct foo_driver_data {
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* int blarg;
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* DEVICE_MMIO_NAMED_RAM(courge);
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* DEVICE_MMIO_NAMED_RAM(grault);
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* int wibble;
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* ...
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* }
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*
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* No build-time initialization of this memory is necessary; it
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* will be set up in the init function by DEVICE_MMIO_NAMED_MAP().
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*
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* @param name Member name to use to store within dev_data.
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*/
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#ifdef DEVICE_MMIO_IS_IN_RAM
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#define DEVICE_MMIO_NAMED_RAM(name) mm_reg_t name
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#else
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#define DEVICE_MMIO_NAMED_RAM(name)
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#endif /* DEVICE_MMIO_IS_IN_RAM */
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#ifdef DEVICE_MMIO_IS_IN_RAM
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/**
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* @def DEVICE_MMIO_NAMED_RAM_PTR(dev, name)
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*
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* @brief Return a pointer to the RAM storage for a device's named MMIO address
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*
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* This macro requires that the macro DEV_DATA is locally defined and returns
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* a properly typed pointer to the particular dev_data struct for this driver.
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*
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* @param dev device instance object
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* @param name Member name within dev_data
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* @retval mm_reg_t pointer to storage location
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*/
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#define DEVICE_MMIO_NAMED_RAM_PTR(dev, name) \
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(&(DEV_DATA(dev)->name))
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#endif /* DEVICE_MMIO_IS_IN_RAM */
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/**
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* @def DEVICE_MMIO_NAMED_ROM(name)
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*
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* @brief Declare storage for MMIO data within a device's config struct.
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*
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* This gets accessed by DEVICE_MMIO_NAMED_MAP() and
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* DEVICE_MMIO_NAMED_GET() macros.
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*
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* What gets stored here varies considerably by configuration. Multiple named
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* regions may be declared. There must be corresponding entries in the dev_data
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* struct.
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*
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* This storage is not used if the device is PCIe and may be omitted.
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*
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* If used, this must be initialized at build time with information from DTS
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* using DEVICE_MMIO_NAMED_ROM_INIT()
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*
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* A pointer to this memory may be obtained with DEVICE_MMIO_NAMED_ROM_PTR().
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*
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* Example for a driver named "foo":
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*
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* struct foo_config {
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* int bar;
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* DEVICE_MMIO_NAMED_ROM(courge);
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* DEVICE_MMIO_NAMED_ROM(grault);
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* int baz;
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* ...
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* }
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*
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* @see DEVICE_MMIO_NAMED_ROM_INIT()
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*
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* @param name Member name to store within config
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*/
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#define DEVICE_MMIO_NAMED_ROM(name) struct z_device_mmio_rom name
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/**
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* @def DEVICE_MMIO_NAMED_ROM_PTR(dev, name)
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*
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* Return a pointer to the ROM-based storage area for a device's MMIO
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* information.
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*
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* This macro requires that the macro DEV_CFG is locally defined and returns
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* a properly typed pointer to the particular config struct for this
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* driver.
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*
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* @param dev device instance object
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* @param name Member name within config
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* @retval struct device_mmio_rom * pointer to storage location
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*/
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#define DEVICE_MMIO_NAMED_ROM_PTR(dev, name) (&(DEV_CFG(dev)->name))
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/**
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* @def DEVICE_MMIO_NAMED_ROM_INIT(name, node_id)
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*
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* @brief Initialize a named DEVICE_MMIO_NAMED_ROM member
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*
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* Initialize MMIO-related information within a specific instance of
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* a device config struct, using information from DTS.
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*
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* Example for an instance of a driver belonging to the "foo" subsystem
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* that will have two regions named 'courge' and 'grault':
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*
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* struct foo_config my_config = {
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* bar = 7;
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* DEVICE_MMIO_NAMED_ROM_INIT(courge, DT_DRV_INST(...));
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* DEVICE_MMIO_NAMED_ROM_INIT(grault, DT_DRV_INST(...));
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* baz = 2;
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* ...
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* }
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*
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* @see DEVICE_MMIO_NAMED_ROM()
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*
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* @param name Member name within config for the MMIO region
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* @param node_id DTS node identifier
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*/
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#define DEVICE_MMIO_NAMED_ROM_INIT(name, node_id) \
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.name = Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
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/**
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* @def DEVICE_MMIO_NAMED_MAP(dev, name, flags)
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*
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* @brief Set up memory for a named MMIO region
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*
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* This performs the necessary PCI probing and/or MMU virtual memory mapping
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* such that DEVICE_MMIO_GET(name) returns a suitable linear memory address
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* for the MMIO region.
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*
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* If such operations are not required by the target hardware, this expands
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* to nothing.
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*
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* This should be called from the driver's init function, once for each
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* MMIO region that needs to be mapped.
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*
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* This macro requires that the macros DEV_DATA and DEV_CFG are locally
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* defined and return properly typed pointers to the particular dev_data
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* and config structs for this driver.
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*
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* The flags argument is currently used for caching mode, which should be
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* one of the DEVICE_CACHE_* macros. Unused bits are reserved for future
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* expansion.
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*
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* @param dev Device object
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* @param name Member name for MMIO information, as declared with
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* DEVICE_MMIO_NAMED_RAM/DEVICE_MMIO_NAMED_ROM
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* @param flags One of the DEVICE_CACHE_* caching modes
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*/
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#ifdef DEVICE_MMIO_IS_IN_RAM
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#define DEVICE_MMIO_NAMED_MAP(dev, name, flags) \
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device_map(DEVICE_MMIO_NAMED_RAM_PTR((dev), name), \
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(DEVICE_MMIO_NAMED_ROM_PTR((dev), name)->phys_addr), \
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(DEVICE_MMIO_NAMED_ROM_PTR((dev), name)->size), \
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(flags))
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#else
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#define DEVICE_MMIO_NAMED_MAP(dev, name, flags) do { } while (0)
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#endif
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/**
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* @def DEVICE_MMIO_NAMED_GET(dev, name)
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*
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* @brief Obtain a named MMIO address for a device
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*
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* This macro returns the MMIO base address for a named region from the
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* appropriate place within the device object's linked data structures.
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*
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* This is for drivers which have multiple MMIO regions.
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*
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* This macro requires that the macros DEV_DATA and DEV_CFG are locally
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* defined and return properly typed pointers to the particular dev_data
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* and config structs for this driver.
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*
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* @see DEVICE_MMIO_GET
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*
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* @param dev Device object
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* @param name Member name for MMIO information, as declared with
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|
* DEVICE_MMIO_NAMED_RAM/DEVICE_MMIO_NAMED_ROM
|
|
* @return mm_reg_t linear address of the MMIO region
|
|
*/
|
|
#ifdef DEVICE_MMIO_IS_IN_RAM
|
|
#define DEVICE_MMIO_NAMED_GET(dev, name) \
|
|
(*DEVICE_MMIO_NAMED_RAM_PTR((dev), name))
|
|
#else
|
|
#define DEVICE_MMIO_NAMED_GET(dev, name) \
|
|
((DEVICE_MMIO_NAMED_ROM_PTR((dev), name))->addr)
|
|
#endif /* DEVICE_MMIO_IS_IN_RAM */
|
|
|
|
/** @} */
|
|
|
|
/**
|
|
* @defgroup device-mmio-toplevel Top-level MMIO region macros
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|
* @ingroup device-mmio
|
|
*
|
|
* For drivers which do not use Zephyr's driver model and do not
|
|
* associate struct device with a driver instance. Top-level storage
|
|
* is used instead, with either global or static scope.
|
|
*
|
|
* This is often useful for interrupt controller and timer drivers.
|
|
*
|
|
* Currently PCIe devices are not well-supported with this set of macros.
|
|
* Either use Zephyr's driver model for these kinds of devices, or
|
|
* manage memory manually with calls to device_map().
|
|
*
|
|
* @{
|
|
*/
|
|
|
|
#define Z_TOPLEVEL_ROM_NAME(name) _CONCAT(z_mmio_rom__, name)
|
|
#define Z_TOPLEVEL_RAM_NAME(name) _CONCAT(z_mmio_ram__, name)
|
|
|
|
/**
|
|
* @def DEVICE_MMIO_TOPLEVEL(name, node_id)
|
|
*
|
|
* @brief Declare top-level storage for MMIO information, global scope
|
|
*
|
|
* This is intended for drivers which do not use Zephyr's driver model
|
|
* of config/dev_data linked to a struct device.
|
|
*
|
|
* Instead, this is a top-level declaration for the driver's C file.
|
|
* The scope of this declaration is global and may be referenced by
|
|
* other C files, using DEVICE_MMIO_TOPLEVEL_DECLARE.
|
|
*
|
|
* @param name Base symbol name
|
|
* @param node_id Device-tree node identifier for this region
|
|
*/
|
|
#ifdef DEVICE_MMIO_IS_IN_RAM
|
|
#define DEVICE_MMIO_TOPLEVEL(name, node_id) \
|
|
__pinned_bss \
|
|
mm_reg_t Z_TOPLEVEL_RAM_NAME(name); \
|
|
__pinned_rodata \
|
|
const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name) = \
|
|
Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
|
|
#else
|
|
#define DEVICE_MMIO_TOPLEVEL(name, node_id) \
|
|
__pinned_rodata \
|
|
const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name) = \
|
|
Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
|
|
#endif /* DEVICE_MMIO_IS_IN_RAM */
|
|
|
|
/**
|
|
* @def DEVICE_MMIO_TOPLEVEL_DECLARE(name)
|
|
*
|
|
* Provide an extern reference to a top-level MMIO region
|
|
*
|
|
* If a top-level MMIO region defined with DEVICE_MMIO_DEFINE needs to be
|
|
* referenced from other C files, this macro provides the necessary extern
|
|
* definitions.
|
|
*
|
|
* @see DEVICE_MMIO_TOPLEVEL
|
|
*
|
|
* @param name Name of the top-level MMIO region
|
|
*/
|
|
|
|
#ifdef DEVICE_MMIO_IS_IN_RAM
|
|
#define DEVICE_MMIO_TOPLEVEL_DECLARE(name) \
|
|
extern mm_reg_t Z_TOPLEVEL_RAM_NAME(name); \
|
|
extern const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name)
|
|
#else
|
|
#define DEVICE_MMIO_TOPLEVEL_DECLARE(name) \
|
|
extern const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name)
|
|
#endif /* DEVICE_MMIO_IS_IN_RAM */
|
|
|
|
/**
|
|
* @def DEVICE_MMIO_TOPLEVEL_STATIC(name, node_id)
|
|
*
|
|
* @brief Declare top-level storage for MMIO information, static scope
|
|
*
|
|
* This is intended for drivers which do not use Zephyr's driver model
|
|
* of config/dev_data linked to a struct device.
|
|
*
|
|
* Instead, this is a top-level declaration for the driver's C file.
|
|
* The scope of this declaration is static.
|
|
*
|
|
* @param name Name of the top-level MMIO region
|
|
* @param node_id Device-tree node identifier for this region
|
|
*/
|
|
#ifdef DEVICE_MMIO_IS_IN_RAM
|
|
#define DEVICE_MMIO_TOPLEVEL_STATIC(name, node_id) \
|
|
__pinned_bss \
|
|
static mm_reg_t Z_TOPLEVEL_RAM_NAME(name); \
|
|
__pinned_rodata \
|
|
static const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name) = \
|
|
Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
|
|
#else
|
|
#define DEVICE_MMIO_TOPLEVEL_STATIC(name, node_id) \
|
|
__pinned_rodata \
|
|
static const struct z_device_mmio_rom Z_TOPLEVEL_ROM_NAME(name) = \
|
|
Z_DEVICE_MMIO_ROM_INITIALIZER(node_id)
|
|
#endif /* DEVICE_MMIO_IS_IN_RAM */
|
|
|
|
#ifdef DEVICE_MMIO_IS_IN_RAM
|
|
/**
|
|
* @def DEVICE_MMIO_TOPLEVEL_RAM_PTR(name)
|
|
*
|
|
* @brief Return a pointer to the RAM storage for a device's toplevel MMIO
|
|
* address.
|
|
*
|
|
* @param name Name of toplevel MMIO region
|
|
* @retval mm_reg_t pointer to storage location
|
|
*/
|
|
#define DEVICE_MMIO_TOPLEVEL_RAM_PTR(name) &Z_TOPLEVEL_RAM_NAME(name)
|
|
#endif /* DEVICE_MMIO_IS_IN_RAM */
|
|
|
|
/**
|
|
* @def DEVICE_MMIO_TOPLEVEL_ROM_PTR(name)
|
|
*
|
|
* Return a pointer to the ROM-based storage area for a toplevel MMIO region.
|
|
*
|
|
* @param name MMIO region name
|
|
* @retval struct device_mmio_rom * pointer to storage location
|
|
*/
|
|
#define DEVICE_MMIO_TOPLEVEL_ROM_PTR(name) &Z_TOPLEVEL_ROM_NAME(name)
|
|
|
|
/**
|
|
* @def DEVICE_MMIO_TOPLEVEL_MAP(name, flags)
|
|
*
|
|
* @brief Set up memory for a driver'sMMIO region
|
|
*
|
|
* This performs the necessary MMU virtual memory mapping
|
|
* such that DEVICE_MMIO_GET() returns a suitable linear memory address
|
|
* for the MMIO region.
|
|
*
|
|
* If such operations are not required by the target hardware, this expands
|
|
* to nothing.
|
|
*
|
|
* This should be called once from the driver's init function.
|
|
*
|
|
* The flags argument is currently used for caching mode, which should be
|
|
* one of the DEVICE_CACHE_* macros. Unused bits are reserved for future
|
|
* expansion.
|
|
*
|
|
* @param name Name of the top-level MMIO region
|
|
* @param flags One of the DEVICE_CACHE_* caching modes
|
|
*/
|
|
#ifdef DEVICE_MMIO_IS_IN_RAM
|
|
#define DEVICE_MMIO_TOPLEVEL_MAP(name, flags) \
|
|
device_map(&Z_TOPLEVEL_RAM_NAME(name), \
|
|
Z_TOPLEVEL_ROM_NAME(name).phys_addr, \
|
|
Z_TOPLEVEL_ROM_NAME(name).size, flags)
|
|
#else
|
|
#define DEVICE_MMIO_TOPLEVEL_MAP(name, flags) do { } while (0)
|
|
#endif
|
|
|
|
/**
|
|
* @def DEVICE_MMIO_TOPLEVEL_GET(name)
|
|
*
|
|
* @brief Obtain the MMIO address for a device declared top-level
|
|
*
|
|
* @see DEVICE_MMIO_GET
|
|
*
|
|
* @param name Name of the top-level MMIO region
|
|
* @return mm_reg_t linear address of the MMIO region
|
|
*/
|
|
#ifdef DEVICE_MMIO_IS_IN_RAM
|
|
#define DEVICE_MMIO_TOPLEVEL_GET(name) \
|
|
((mm_reg_t)Z_TOPLEVEL_RAM_NAME(name))
|
|
#else
|
|
#define DEVICE_MMIO_TOPLEVEL_GET(name) \
|
|
((mm_reg_t)Z_TOPLEVEL_ROM_NAME(name).addr)
|
|
#endif
|
|
/** @} */
|
|
|
|
#endif /* ZEPHYR_INCLUDE_SYS_DEVICE_MMIO_H */
|