465 lines
12 KiB
C
465 lines
12 KiB
C
/*
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* Copyright (c) 2019 Brett Witherspoon
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <device.h>
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#include <errno.h>
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#include <misc/__assert.h>
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#include <uart.h>
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#include <driverlib/ioc.h>
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#include <driverlib/prcm.h>
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#include <driverlib/uart.h>
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struct uart_cc13xx_cc26xx_data {
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struct uart_config uart_config;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_user_data_t callback;
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void *user_data;
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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#ifdef CONFIG_UART_CC13XX_CC26XX_0
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DEVICE_DECLARE(uart_cc13xx_cc26xx_0);
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#endif /* CONFIG_UART_CC13XX_CC26XX_0 */
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#ifdef CONFIG_UART_CC13XX_CC26XX_1
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DEVICE_DECLARE(uart_cc13xx_cc26xx_1);
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#endif /* CONFIG_UART_CC13XX_CC26XX_1 */
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static inline struct uart_cc13xx_cc26xx_data *get_dev_data(struct device *dev)
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{
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return dev->driver_data;
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}
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static inline const struct uart_device_config *get_dev_conf(struct device *dev)
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{
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return dev->config->config_info;
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}
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static int uart_cc13xx_cc26xx_poll_in(struct device *dev, unsigned char *c)
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{
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if (!UARTCharsAvail(get_dev_conf(dev)->regs)) {
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return -1;
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}
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*c = UARTCharGetNonBlocking(get_dev_conf(dev)->regs);
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return 0;
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}
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static void uart_cc13xx_cc26xx_poll_out(struct device *dev, unsigned char c)
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{
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UARTCharPut(get_dev_conf(dev)->regs, c);
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}
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static int uart_cc13xx_cc26xx_err_check(struct device *dev)
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{
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u32_t flags = UARTRxErrorGet(get_dev_conf(dev)->regs);
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int error = (flags & UART_RXERROR_FRAMING ? UART_ERROR_FRAMING : 0) |
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(flags & UART_RXERROR_PARITY ? UART_ERROR_PARITY : 0) |
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(flags & UART_RXERROR_BREAK ? UART_BREAK : 0) |
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(flags & UART_RXERROR_OVERRUN ? UART_ERROR_OVERRUN : 0);
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UARTRxErrorClear(get_dev_conf(dev)->regs);
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return error;
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}
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static int uart_cc13xx_cc26xx_configure(struct device *dev,
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const struct uart_config *cfg)
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{
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u32_t line_ctrl = 0;
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bool flow_ctrl;
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switch (cfg->parity) {
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case UART_CFG_PARITY_NONE:
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line_ctrl |= UART_CONFIG_PAR_NONE;
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break;
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case UART_CFG_PARITY_ODD:
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line_ctrl |= UART_CONFIG_PAR_ODD;
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break;
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case UART_CFG_PARITY_EVEN:
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line_ctrl |= UART_CONFIG_PAR_EVEN;
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break;
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case UART_CFG_PARITY_MARK:
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line_ctrl |= UART_CONFIG_PAR_ONE;
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break;
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case UART_CFG_PARITY_SPACE:
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line_ctrl |= UART_CONFIG_PAR_ZERO;
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break;
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default:
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return -EINVAL;
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}
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switch (cfg->stop_bits) {
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case UART_CFG_STOP_BITS_1:
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line_ctrl |= UART_CONFIG_STOP_ONE;
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break;
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case UART_CFG_STOP_BITS_2:
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line_ctrl |= UART_CONFIG_STOP_TWO;
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break;
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case UART_CFG_STOP_BITS_0_5:
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case UART_CFG_STOP_BITS_1_5:
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return -ENOTSUP;
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default:
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return -EINVAL;
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}
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switch (cfg->data_bits) {
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case UART_CFG_DATA_BITS_5:
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line_ctrl |= UART_CONFIG_WLEN_5;
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break;
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case UART_CFG_DATA_BITS_6:
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line_ctrl |= UART_CONFIG_WLEN_6;
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break;
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case UART_CFG_DATA_BITS_7:
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line_ctrl |= UART_CONFIG_WLEN_7;
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break;
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case UART_CFG_DATA_BITS_8:
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line_ctrl |= UART_CONFIG_WLEN_8;
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break;
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default:
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return -EINVAL;
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}
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switch (cfg->flow_ctrl) {
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case UART_CFG_FLOW_CTRL_NONE:
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flow_ctrl = false;
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break;
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case UART_CFG_FLOW_CTRL_RTS_CTS:
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flow_ctrl = true;
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break;
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case UART_CFG_FLOW_CTRL_DTR_DSR:
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return -ENOTSUP;
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default:
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return -EINVAL;
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}
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/* Disables UART before setting control registers */
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UARTConfigSetExpClk(get_dev_conf(dev)->regs,
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get_dev_conf(dev)->sys_clk_freq, cfg->baudrate,
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line_ctrl);
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if (flow_ctrl) {
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UARTHwFlowControlEnable(get_dev_conf(dev)->regs);
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} else {
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UARTHwFlowControlDisable(get_dev_conf(dev)->regs);
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}
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/* Re-enable UART */
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UARTEnable(get_dev_conf(dev)->regs);
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/* Disabled FIFOs act as 1-byte-deep holding registers (character mode) */
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UARTFIFODisable(get_dev_conf(dev)->regs);
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get_dev_data(dev)->uart_config = *cfg;
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return 0;
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}
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static int uart_cc13xx_cc26xx_config_get(struct device *dev,
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struct uart_config *cfg)
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{
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*cfg = get_dev_data(dev)->uart_config;
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return 0;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int uart_cc13xx_cc26xx_fifo_fill(struct device *dev, const u8_t *buf,
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int len)
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{
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int n = 0;
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while (n < len) {
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if (!UARTCharPutNonBlocking(get_dev_conf(dev)->regs, buf[n])) {
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break;
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}
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n++;
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}
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return n;
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}
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static int uart_cc13xx_cc26xx_fifo_read(struct device *dev, u8_t *buf,
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const int len)
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{
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int c, n;
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n = 0;
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while (n < len) {
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c = UARTCharGetNonBlocking(get_dev_conf(dev)->regs);
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if (c == -1) {
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break;
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}
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buf[n++] = c;
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}
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return n;
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}
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static void uart_cc13xx_cc26xx_irq_tx_enable(struct device *dev)
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{
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UARTIntEnable(get_dev_conf(dev)->regs, UART_INT_TX);
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}
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static void uart_cc13xx_cc26xx_irq_tx_disable(struct device *dev)
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{
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UARTIntDisable(get_dev_conf(dev)->regs, UART_INT_TX);
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}
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static int uart_cc13xx_cc26xx_irq_tx_ready(struct device *dev)
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{
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return UARTSpaceAvail(get_dev_conf(dev)->regs) ? 1 : 0;
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}
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static void uart_cc13xx_cc26xx_irq_rx_enable(struct device *dev)
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{
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UARTIntEnable(get_dev_conf(dev)->regs, UART_INT_RX);
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}
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static void uart_cc13xx_cc26xx_irq_rx_disable(struct device *dev)
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{
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UARTIntDisable(get_dev_conf(dev)->regs, UART_INT_RX);
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}
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static int uart_cc13xx_cc26xx_irq_tx_complete(struct device *dev)
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{
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return UARTBusy(get_dev_conf(dev)->regs) ? 0 : 1;
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}
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static int uart_cc13xx_cc26xx_irq_rx_ready(struct device *dev)
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{
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return UARTCharsAvail(get_dev_conf(dev)->regs) ? 1 : 0;
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}
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static void uart_cc13xx_cc26xx_irq_err_enable(struct device *dev)
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{
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return UARTIntEnable(get_dev_conf(dev)->regs,
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UART_INT_OE | UART_INT_BE | UART_INT_PE |
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UART_INT_FE);
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}
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static void uart_cc13xx_cc26xx_irq_err_disable(struct device *dev)
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{
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return UARTIntDisable(get_dev_conf(dev)->regs,
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UART_INT_OE | UART_INT_BE | UART_INT_PE |
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UART_INT_FE);
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}
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static int uart_cc13xx_cc26xx_irq_is_pending(struct device *dev)
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{
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u32_t status = UARTIntStatus(get_dev_conf(dev)->regs, true);
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return status & (UART_INT_TX | UART_INT_RX) ? 1 : 0;
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}
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static int uart_cc13xx_cc26xx_irq_update(struct device *dev)
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{
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ARG_UNUSED(dev);
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return 1;
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}
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static void uart_cc13xx_cc26xx_irq_callback_set(
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struct device *dev, uart_irq_callback_user_data_t cb, void *user_data)
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{
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struct uart_cc13xx_cc26xx_data *data = get_dev_data(dev);
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data->callback = cb;
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data->user_data = user_data;
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}
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static void uart_cc13xx_cc26xx_isr(void *arg)
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{
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struct uart_cc13xx_cc26xx_data *data = get_dev_data(arg);
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if (data->callback) {
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data->callback(data->user_data);
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}
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static const struct uart_driver_api uart_cc13xx_cc26xx_driver_api = {
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.poll_in = uart_cc13xx_cc26xx_poll_in,
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.poll_out = uart_cc13xx_cc26xx_poll_out,
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.err_check = uart_cc13xx_cc26xx_err_check,
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.configure = uart_cc13xx_cc26xx_configure,
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.config_get = uart_cc13xx_cc26xx_config_get,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_fill = uart_cc13xx_cc26xx_fifo_fill,
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.fifo_read = uart_cc13xx_cc26xx_fifo_read,
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.irq_tx_enable = uart_cc13xx_cc26xx_irq_tx_enable,
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.irq_tx_disable = uart_cc13xx_cc26xx_irq_tx_disable,
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.irq_tx_ready = uart_cc13xx_cc26xx_irq_tx_ready,
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.irq_rx_enable = uart_cc13xx_cc26xx_irq_rx_enable,
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.irq_rx_disable = uart_cc13xx_cc26xx_irq_rx_disable,
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.irq_tx_complete = uart_cc13xx_cc26xx_irq_tx_complete,
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.irq_rx_ready = uart_cc13xx_cc26xx_irq_rx_ready,
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.irq_err_enable = uart_cc13xx_cc26xx_irq_err_enable,
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.irq_err_disable = uart_cc13xx_cc26xx_irq_err_disable,
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.irq_is_pending = uart_cc13xx_cc26xx_irq_is_pending,
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.irq_update = uart_cc13xx_cc26xx_irq_update,
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.irq_callback_set = uart_cc13xx_cc26xx_irq_callback_set,
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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#ifdef CONFIG_UART_CC13XX_CC26XX_0
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static int uart_cc13xx_cc26xx_init_0(struct device *dev)
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{
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int ret;
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/* Enable UART power domain */
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PRCMPowerDomainOn(PRCM_DOMAIN_SERIAL);
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/* Enable UART peripherals */
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PRCMPeripheralRunEnable(PRCM_PERIPH_UART0);
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PRCMPeripheralSleepEnable(PRCM_PERIPH_UART0);
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/* Load PRCM settings */
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PRCMLoadSet();
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while (!PRCMLoadGet()) {
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continue;
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}
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/* UART should not be accessed until power domain is on. */
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while (PRCMPowerDomainStatus(PRCM_DOMAIN_SERIAL) !=
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PRCM_DOMAIN_POWER_ON) {
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continue;
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}
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/* Configure IOC module to map UART signals to pins */
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IOCPortConfigureSet(DT_TI_CC13XX_CC26XX_UART_40001000_TX_PIN,
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IOC_PORT_MCU_UART0_TX, IOC_STD_OUTPUT);
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IOCPortConfigureSet(DT_TI_CC13XX_CC26XX_UART_40001000_RX_PIN,
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IOC_PORT_MCU_UART0_RX, IOC_STD_INPUT);
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/* Configure and enable UART */
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ret = uart_cc13xx_cc26xx_configure(dev,
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&get_dev_data(dev)->uart_config);
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/* Enable interrupts */
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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UARTIntClear(get_dev_conf(dev)->regs, UART_INT_RX);
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IRQ_CONNECT(DT_TI_CC13XX_CC26XX_UART_40001000_IRQ_0,
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DT_TI_CC13XX_CC26XX_UART_40001000_IRQ_0_PRIORITY,
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uart_cc13xx_cc26xx_isr, DEVICE_GET(uart_cc13xx_cc26xx_0),
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0);
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irq_enable(DT_TI_CC13XX_CC26XX_UART_40001000_IRQ_0);
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/* Causes an initial TX ready interrupt when TX interrupt is enabled */
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UARTCharPutNonBlocking(get_dev_conf(dev)->regs, '\0');
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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return ret;
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}
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static const struct uart_device_config uart_cc13xx_cc26xx_config_0 = {
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.regs = DT_TI_CC13XX_CC26XX_UART_40001000_BASE_ADDRESS,
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.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
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};
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static struct uart_cc13xx_cc26xx_data uart_cc13xx_cc26xx_data_0 = {
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.uart_config = {
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.baudrate = DT_TI_CC13XX_CC26XX_UART_40001000_CURRENT_SPEED,
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.parity = UART_CFG_PARITY_NONE,
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.stop_bits = UART_CFG_STOP_BITS_1,
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.data_bits = UART_CFG_DATA_BITS_8,
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.flow_ctrl = UART_CFG_FLOW_CTRL_NONE,
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},
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.callback = NULL,
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.user_data = NULL,
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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DEVICE_AND_API_INIT(uart_cc13xx_cc26xx_0,
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DT_TI_CC13XX_CC26XX_UART_40001000_LABEL,
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uart_cc13xx_cc26xx_init_0, &uart_cc13xx_cc26xx_data_0,
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&uart_cc13xx_cc26xx_config_0, PRE_KERNEL_1,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_cc13xx_cc26xx_driver_api);
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#endif /* CONFIG_UART_CC13XX_CC26XX_0 */
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#ifdef CONFIG_UART_CC13XX_CC26XX_1
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static int uart_cc13xx_cc26xx_init_1(struct device *dev)
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{
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int ret;
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/* Enable UART power domain */
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PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
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/* Enable UART peripherals */
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PRCMPeripheralRunEnable(PRCM_PERIPH_UART1);
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/* Load PRCM settings */
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PRCMLoadSet();
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while (!PRCMLoadGet()) {
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continue;
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}
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/* UART should not be accessed until power domain is on. */
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while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) !=
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PRCM_DOMAIN_POWER_ON) {
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continue;
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}
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/* Configure IOC module to map UART signals to pins */
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IOCPortConfigureSet(DT_TI_CC13XX_CC26XX_UART_4000B000_TX_PIN,
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IOC_PORT_MCU_UART1_TX, IOC_STD_OUTPUT);
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IOCPortConfigureSet(DT_TI_CC13XX_CC26XX_UART_4000B000_RX_PIN,
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IOC_PORT_MCU_UART1_RX, IOC_STD_INPUT);
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/* Configure and enable UART */
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ret = uart_cc13xx_cc26xx_configure(dev,
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&get_dev_data(dev)->uart_config);
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/* Enable interrupts */
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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UARTIntClear(get_dev_conf(dev)->regs, UART_INT_RX);
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IRQ_CONNECT(DT_TI_CC13XX_CC26XX_UART_4000B000_IRQ_0,
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DT_TI_CC13XX_CC26XX_UART_4000B000_IRQ_0_PRIORITY,
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uart_cc13xx_cc26xx_isr, DEVICE_GET(uart_cc13xx_cc26xx_1),
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0);
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irq_enable(DT_TI_CC13XX_CC26XX_UART_4000B000_IRQ_0);
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/* Causes an initial TX ready interrupt when TX interrupt is enabled */
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UARTCharPutNonBlocking(get_dev_conf(dev)->regs, '\0');
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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return ret;
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}
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static const struct uart_device_config uart_cc13xx_cc26xx_config_1 = {
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.regs = DT_TI_CC13XX_CC26XX_UART_4000B000_BASE_ADDRESS,
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.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
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};
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static struct uart_cc13xx_cc26xx_data uart_cc13xx_cc26xx_data_1 = {
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.uart_config = {
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.baudrate = DT_TI_CC13XX_CC26XX_UART_4000B000_CURRENT_SPEED,
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.parity = UART_CFG_PARITY_NONE,
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.stop_bits = UART_CFG_STOP_BITS_1,
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.data_bits = UART_CFG_DATA_BITS_8,
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.flow_ctrl = UART_CFG_FLOW_CTRL_NONE,
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},
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.callback = NULL,
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.user_data = NULL,
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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DEVICE_AND_API_INIT(uart_cc13xx_cc26xx_1,
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DT_TI_CC13XX_CC26XX_UART_4000B000_LABEL,
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uart_cc13xx_cc26xx_init_1, &uart_cc13xx_cc26xx_data_1,
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&uart_cc13xx_cc26xx_config_1, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_cc13xx_cc26xx_driver_api);
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#endif /* CONFIG_UART_CC13XX_CC26XX_1 */
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