d4023b3c1b
Reserve the upper 8 bits of gpio_dt_flags_t for SoC specific flags and move the non-standard, hardware-specific GPIO devicetree flags (IO voltage level, drive strength, debounce filter) from the generic dt-bindings/gpio/gpio.h header to SoC specific dt-bindings headers. Some of the SoC specific dt-bindings flags take up more bits than necessary in order to retain backwards compatibility with the deprecated GPIO flags. The width of these fields can be reduced/optimized once the deprecated flags are removed. Remove hardcoded use of GPIO_INT_DEBOUNCE in GPIO client drivers. This flag can now be set in the devicetree for boards/SoCs with debounce filter support. The SoC specific debounce flags have had the _INT part of their name removed since these flag must be passed to gpio_pin_configure(), not gpio_pin_interrupt_configure(). Signed-off-by: Henrik Brix Andersen <hebad@vestas.com> |
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.. | ||
boards | ||
dts/bindings | ||
src | ||
CMakeLists.txt | ||
README.txt | ||
prj.conf | ||
testcase.yaml |
README.txt
GPIO 2-Pin Test ############### This application tests the GPIO subsystem using a hardware configuration where two GPIOs are directly wired together. The test pins are identified through a test-specific devicetree binding in the `dts/` subdirectory, implemented for specific boards by overlay files in the `boards/` directory. For some boards `src/main.c` may also need to be extended to configure the selected pins for use as GPIOs. Only boards for which an overlay is present can pass this test. Boards without an overlay, or for which the required wiring is not provided, will fail with an error like this: Validate device GPIO_0 Check GPIO_0 output 2 connected to input 3 FATAL output pin not wired to input pin? (out high => in low) No special build options are required to make use of the overlay.