365 lines
9.3 KiB
C
365 lines
9.3 KiB
C
/*
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* Copyright (c) 2017, Linaro Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* See www.ti.com/lit/pdf/slau356f, Chapter 22, for MSP432P4XX UART info. */
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/* include driverlib/gpio.h (from the msp432p4xx SDK) before Z's uart.h so
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* that the definition of BIT is not overriden */
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#include <driverlib/gpio.h>
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#include <uart.h>
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/* Driverlib includes */
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#include <driverlib/rom.h>
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#include <driverlib/rom_map.h>
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#include <driverlib/uart.h>
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struct uart_msp432p4xx_dev_data_t {
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/* UART config structure */
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eUSCI_UART_Config uartConfig;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_t cb; /**< Callback function pointer */
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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#define DEV_CFG(dev) \
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((const struct uart_device_config * const)(dev)->config->config_info)
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#define DEV_DATA(dev) \
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((struct uart_msp432p4xx_dev_data_t * const)(dev)->driver_data)
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static struct device DEVICE_NAME_GET(uart_msp432p4xx_0);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void uart_msp432p4xx_isr(void *arg);
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#endif
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static const struct uart_device_config uart_msp432p4xx_dev_cfg_0 = {
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.base = (void *)CONFIG_UART_MSP432P4XX_BASE_ADDRESS,
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.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
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};
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static struct uart_msp432p4xx_dev_data_t uart_msp432p4xx_dev_data_0 = {
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.cb = NULL,
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#endif
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};
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static int baudrate_set(eUSCI_UART_Config *config, uint32_t baudrate)
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{
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u16_t prescalar;
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u8_t first_mod_reg, second_mod_reg;
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switch (baudrate) {
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case 1200:
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prescalar = 2500;
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first_mod_reg = 0;
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second_mod_reg = 0;
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break;
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case 2400:
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prescalar = 1250;
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first_mod_reg = 0;
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second_mod_reg = 0;
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break;
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case 4800:
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prescalar = 625;
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first_mod_reg = 0;
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second_mod_reg = 0;
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break;
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case 9600:
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prescalar = 312;
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first_mod_reg = 8;
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second_mod_reg = 0;
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break;
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case 19200:
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prescalar = 156;
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first_mod_reg = 4;
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second_mod_reg = 0;
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break;
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case 38400:
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prescalar = 78;
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first_mod_reg = 2;
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second_mod_reg = 0;
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break;
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case 57600:
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prescalar = 52;
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first_mod_reg = 1;
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second_mod_reg = 37;
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break;
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case 115200:
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prescalar = 26;
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first_mod_reg = 0;
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second_mod_reg = 111;
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break;
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case 230400:
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prescalar = 13;
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first_mod_reg = 0;
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second_mod_reg = 37;
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break;
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case 460800:
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prescalar = 6;
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first_mod_reg = 8;
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second_mod_reg = 32;
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break;
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default:
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return -EINVAL;
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}
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config->clockPrescalar = prescalar;
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config->firstModReg = first_mod_reg;
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config->secondModReg = second_mod_reg;
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return 0;
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}
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static int uart_msp432p4xx_init(struct device *dev)
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{
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int err;
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const struct uart_device_config *config = DEV_CFG(dev);
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eUSCI_UART_Config UartConfig;
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/* Select P1.2 and P1.3 in UART mode */
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MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P1,
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(GPIO_PIN2 | GPIO_PIN3), GPIO_PRIMARY_MODULE_FUNCTION);
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UartConfig.selectClockSource = EUSCI_A_UART_CLOCKSOURCE_SMCLK;
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UartConfig.parity = EUSCI_A_UART_NO_PARITY;
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UartConfig.msborLsbFirst = EUSCI_A_UART_LSB_FIRST;
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UartConfig.numberofStopBits = EUSCI_A_UART_ONE_STOP_BIT;
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UartConfig.uartMode = EUSCI_A_UART_MODE;
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UartConfig.overSampling = EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION;
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/* Baud rate settings calculated for 48MHz */
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err = baudrate_set(&UartConfig, CONFIG_UART_MSP432P4XX_BAUD_RATE);
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if (err) {
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return err;
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}
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/* Configure UART Module */
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MAP_UART_initModule((unsigned long)config->base, &UartConfig);
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/* Enable UART module */
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MAP_UART_enableModule((unsigned long)config->base);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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IRQ_CONNECT(TI_MSP432P4XX_UART_40001000_IRQ_0,
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TI_MSP432P4XX_UART_40001000_IRQ_0_PRIORITY,
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uart_msp432p4xx_isr, DEVICE_GET(uart_msp432p4xx_0),
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0);
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irq_enable(TI_MSP432P4XX_UART_40001000_IRQ_0);
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#endif
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return 0;
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}
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static int uart_msp432p4xx_poll_in(struct device *dev, unsigned char *c)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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*c = MAP_UART_receiveData((unsigned long)config->base);
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return 0;
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}
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static unsigned char uart_msp432p4xx_poll_out(struct device *dev,
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unsigned char c)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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MAP_UART_transmitData((unsigned long)config->base, c);
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return c;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int uart_msp432p4xx_fifo_fill(struct device *dev,
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const u8_t *tx_data, int size)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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unsigned int num_tx = 0;
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while ((size - num_tx) > 0) {
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MAP_UART_transmitData((unsigned long)config->base,
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tx_data[num_tx]);
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if (MAP_UART_getInterruptStatus((unsigned long)config->base,
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EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG)) {
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num_tx++;
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} else {
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break;
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}
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}
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return (int)num_tx;
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}
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static int uart_msp432p4xx_fifo_read(struct device *dev, u8_t *rx_data,
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const int size)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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unsigned int num_rx = 0;
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while (((size - num_rx) > 0) &&
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MAP_UART_getInterruptStatus((unsigned long)config->base,
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EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG)) {
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rx_data[num_rx++] =
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MAP_UART_receiveData((unsigned long)config->base);
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}
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return num_rx;
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}
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static void uart_msp432p4xx_irq_tx_enable(struct device *dev)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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MAP_UART_enableInterrupt((unsigned long)config->base,
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EUSCI_A_UART_TRANSMIT_INTERRUPT);
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}
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static void uart_msp432p4xx_irq_tx_disable(struct device *dev)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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MAP_UART_disableInterrupt((unsigned long)config->base,
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EUSCI_A_UART_TRANSMIT_INTERRUPT);
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}
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static int uart_msp432p4xx_irq_tx_ready(struct device *dev)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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unsigned int int_status;
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int_status = MAP_UART_getInterruptStatus((unsigned long)config->base,
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EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG);
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return (int_status & EUSCI_A_IE_TXIE);
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}
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static void uart_msp432p4xx_irq_rx_enable(struct device *dev)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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MAP_UART_enableInterrupt((unsigned long)config->base,
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EUSCI_A_UART_RECEIVE_INTERRUPT);
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}
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static void uart_msp432p4xx_irq_rx_disable(struct device *dev)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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MAP_UART_disableInterrupt((unsigned long)config->base,
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EUSCI_A_UART_RECEIVE_INTERRUPT);
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}
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static int uart_msp432p4xx_irq_tx_complete(struct device *dev)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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return MAP_UART_getInterruptStatus((unsigned long)config->base,
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EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG);
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}
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static int uart_msp432p4xx_irq_rx_ready(struct device *dev)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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unsigned int int_status;
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int_status = MAP_UART_getInterruptStatus((unsigned long)config->base,
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EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG);
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return (int_status & EUSCI_A_IE_RXIE);
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}
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static void uart_msp432p4xx_irq_err_enable(struct device *dev)
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{
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/* Not yet used in zephyr */
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}
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static void uart_msp432p4xx_irq_err_disable(struct device *dev)
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{
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/* Not yet used in zephyr */
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}
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static int uart_msp432p4xx_irq_is_pending(struct device *dev)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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unsigned int int_status;
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int_status = MAP_UART_getEnabledInterruptStatus(
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(unsigned long)config->base);
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return (int_status & (EUSCI_A_IE_TXIE | EUSCI_A_IE_RXIE));
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}
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static int uart_msp432p4xx_irq_update(struct device *dev)
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{
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return 1;
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}
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static void uart_msp432p4xx_irq_callback_set(struct device *dev,
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uart_irq_callback_t cb)
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{
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struct uart_msp432p4xx_dev_data_t * const dev_data = DEV_DATA(dev);
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dev_data->cb = cb;
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}
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/**
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* @brief Interrupt service routine.
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*
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* This simply calls the callback function, if one exists.
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*
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* @param arg Argument to ISR.
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*
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* @return N/A
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*/
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static void uart_msp432p4xx_isr(void *arg)
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{
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struct device *dev = arg;
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const struct uart_device_config *config = DEV_CFG(dev);
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struct uart_msp432p4xx_dev_data_t * const dev_data = DEV_DATA(dev);
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unsigned int int_status;
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int_status = MAP_UART_getEnabledInterruptStatus(
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(unsigned long)config->base);
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if (dev_data->cb) {
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dev_data->cb(dev);
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}
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/*
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* Clear interrupts only after cb called, as Zephyr UART clients expect
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* to check interrupt status during the callback.
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*/
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MAP_UART_disableInterrupt((unsigned long)config->base, int_status);
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static const struct uart_driver_api uart_msp432p4xx_driver_api = {
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.poll_in = uart_msp432p4xx_poll_in,
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.poll_out = uart_msp432p4xx_poll_out,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_fill = uart_msp432p4xx_fifo_fill,
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.fifo_read = uart_msp432p4xx_fifo_read,
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.irq_tx_enable = uart_msp432p4xx_irq_tx_enable,
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.irq_tx_disable = uart_msp432p4xx_irq_tx_disable,
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.irq_tx_ready = uart_msp432p4xx_irq_tx_ready,
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.irq_rx_enable = uart_msp432p4xx_irq_rx_enable,
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.irq_rx_disable = uart_msp432p4xx_irq_rx_disable,
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.irq_tx_complete = uart_msp432p4xx_irq_tx_complete,
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.irq_rx_ready = uart_msp432p4xx_irq_rx_ready,
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.irq_err_enable = uart_msp432p4xx_irq_err_enable,
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.irq_err_disable = uart_msp432p4xx_irq_err_disable,
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.irq_is_pending = uart_msp432p4xx_irq_is_pending,
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.irq_update = uart_msp432p4xx_irq_update,
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.irq_callback_set = uart_msp432p4xx_irq_callback_set,
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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DEVICE_AND_API_INIT(uart_msp432p4xx_0, CONFIG_UART_MSP432P4XX_NAME,
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uart_msp432p4xx_init, &uart_msp432p4xx_dev_data_0,
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&uart_msp432p4xx_dev_cfg_0,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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(void *)&uart_msp432p4xx_driver_api);
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