zephyr/boards/arm/frdm_k64f/dts.fixup

16 lines
1.3 KiB
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#define CONFIG_FXOS8700_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_LABEL
#define CONFIG_FXOS8700_I2C_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BUS_NAME
#define CONFIG_FXOS8700_I2C_ADDRESS NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BASE_ADDRESS
#define CONFIG_FXOS8700_GPIO_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_CONTROLLER
#define CONFIG_FXOS8700_GPIO_PIN NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_PIN
#define CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BUS_NAME
#define CONFIG_IEEE802154_MCR20A_SPI_SLAVE NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BASE_ADDRESS
#define CONFIG_IEEE802154_MCR20A_SPI_FREQ NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_SPI_MAX_FREQUENCY
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME NXP_KINETIS_DSPI_4002C000_CS_GPIOS_CONTROLLER
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN NXP_KINETIS_DSPI_4002C000_CS_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_IRQ_B_NAME NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_IRQ_B_PIN NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_RESET_NAME NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_RESET_PIN NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_PIN