49 lines
991 B
C
49 lines
991 B
C
/*
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* Copyright 2022 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <zephyr/arch/arm/aarch32/cortex_a_r/cmsis.h>
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#include <OsIf.h>
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#ifdef CONFIG_INIT_CLOCK_AT_BOOT_TIME
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#include <Clock_Ip.h>
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#include <Clock_Ip_Cfg.h>
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#endif
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void z_arm_platform_init(void)
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{
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/* enable peripheral port access at EL1 and EL0 */
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__asm__ volatile("mrc p15, 0, r0, c15, c0, 0\n");
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__asm__ volatile("orr r0, #1\n");
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__asm__ volatile("mcr p15, 0, r0, c15, c0, 0\n");
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__DSB();
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__ISB();
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}
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static int soc_init(const struct device *arg)
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{
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ARG_UNUSED(arg);
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/* Install default handler that simply resets the CPU if configured in the
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* kernel, NOP otherwise
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*/
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NMI_INIT();
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OsIf_Init(NULL);
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#ifdef CONFIG_INIT_CLOCK_AT_BOOT_TIME
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/* Initialize clocks with tool generated code */
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Clock_Ip_Init(Clock_Ip_aClockConfig);
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#endif
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return 0;
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}
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SYS_INIT(soc_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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