38 lines
1.1 KiB
C
38 lines
1.1 KiB
C
/*
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* Copyright (c) 2022, Commonwealth Scientific and Industrial Research
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* Organisation (CSIRO) ABN 41 687 119 230.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/toolchain.h>
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#include <zephyr/arch/common/semihost.h>
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/*
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* QEMU requires that the semihosting trap instruction sequence, consisting of
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* three uncompressed instructions, lie in the same page, and refuses to
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* interpret the trap sequence if these instructions are placed across two
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* different pages.
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*
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* The `semihost_exec` function, which occupies 12 bytes, is aligned at a
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* 16-byte boundary to ensure that the three trap sequence instructions are
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* never placed across two different pages.
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*/
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long __aligned(16) semihost_exec(enum semihost_instr instr, void *args)
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{
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register unsigned long a0 __asm__ ("a0") = instr;
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register void *a1 __asm__ ("a1") = args;
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register long ret __asm__ ("a0");
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__asm__ volatile (
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".option push\n\t"
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".option norvc\n\t"
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"slli zero, zero, 0x1f\n\t"
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"ebreak\n\t"
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"srai zero, zero, 0x7\n\t"
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".option pop"
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: "=r" (ret) : "r" (a0), "r" (a1) : "memory");
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return ret;
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}
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