73 lines
1.6 KiB
Plaintext
73 lines
1.6 KiB
Plaintext
/*
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* Copyright (c) 2017 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/f4/stm32f4.dtsi>
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/ {
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soc {
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spi2: spi@40003800 {
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compatible = "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
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interrupts = <36 5>;
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status = "disabled";
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label = "SPI_2";
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};
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spi3: spi@40003c00 {
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compatible = "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
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interrupts = <51 5>;
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status = "disabled";
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label = "SPI_3";
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};
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spi4: spi@40013400 {
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compatible = "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40013400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>;
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interrupts = <84 5>;
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status = "disabled";
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label = "SPI_4";
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};
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i2s2: i2s@40003800 {
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compatible = "st,stm32-i2s";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
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interrupts = <36 5>;
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dmas = <&dma1 4 0 0x400 0x3
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&dma1 3 0 0x400 0x3>;
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dma-names = "tx", "rx";
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status = "disabled";
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label = "I2S_2";
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};
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i2s3: i2s@40003c00 {
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compatible = "st,stm32-i2s";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
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interrupts = <51 5>;
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dmas = <&dma1 5 0 0x400 0x3
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&dma1 0 0 0x400 0x3>;
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dma-names = "tx", "rx";
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status = "disabled";
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label = "I2S_3";
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};
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};
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};
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