91 lines
2.0 KiB
C
91 lines
2.0 KiB
C
/*
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* Copyright (c) 2015 Intel Corporation.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file Header file for the MMIO-based GPIO driver.
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*/
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#ifndef _GPIO_MMIO_H_
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#define _GPIO_MMIO_H_
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#include <nanokernel.h>
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#include <gpio.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* For enable register:
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* NORMAL: 0 - disable, 1 - enable
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* INV: 0 - enable, 1 - disable
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*/
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#define GPIO_MMIO_CFG_EN_NORMAL (0)
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#define GPIO_MMIO_CFG_EN_INV BIT(0)
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#define GPIO_MMIO_CFG_EN_MASK BIT(0)
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/* For direction register:
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* NORMAL: 0 - pin is output, 1 - pin is input
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* INV: 0 - pin is input, 1 - pin is output
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*/
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#define GPIO_MMIO_CFG_DIR_NORMAL (0)
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#define GPIO_MMIO_CFG_DIR_INV BIT(1)
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#define GPIO_MMIO_CFG_DIR_MASK BIT(1)
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/**
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* @brief Initialization function for GPIO driver
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*
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* @param dev Device struct
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* @return 0 if successful, failed otherwise
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*/
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extern int gpio_mmio_init(struct device *dev);
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/* internal use only for register access function */
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typedef uint32_t (*__gpio_mmio_access_t)(uint32_t addr, uint32_t bit,
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uint32_t value);
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/** Configuration data */
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struct gpio_mmio_config {
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/* config flags */
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uint32_t cfg_flags;
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struct {
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/* enable register */
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uint32_t en;
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/* direction register */
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uint32_t dir;
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/* pin level register for input*/
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uint32_t input;
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/* pin level register for output */
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uint32_t output;
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} reg;
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struct {
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__gpio_mmio_access_t set_bit;
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__gpio_mmio_access_t read;
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__gpio_mmio_access_t write;
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} access;
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* _GPIO_MMIO_H_ */
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