141 lines
3.9 KiB
C
141 lines
3.9 KiB
C
/*
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* Copyright (c) 2016 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <counter.h>
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#include <device.h>
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#include <errno.h>
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#include <init.h>
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#include <soc.h>
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#include <clock_control/arm_clock_control.h>
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#include "timer_cmsdk_apb.h"
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#define TIMER_MAX_RELOAD 0xFFFFFFFF
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struct counter_tmr_cmsdk_apb_cfg {
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volatile struct timer_cmsdk_apb *timer;
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/* Timer Clock control in Active State */
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const struct arm_clock_control_t timer_cc_as;
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/* Timer Clock control in Sleep State */
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const struct arm_clock_control_t timer_cc_ss;
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/* Timer Clock control in Deep Sleep State */
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const struct arm_clock_control_t timer_cc_dss;
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};
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static int counter_tmr_cmsdk_apb_start(struct device *dev)
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{
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const struct counter_tmr_cmsdk_apb_cfg * const cfg =
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dev->config->config_info;
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/* Set the timer to Max reload */
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cfg->timer->reload = TIMER_MAX_RELOAD;
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/* Enable the timer */
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cfg->timer->ctrl = TIMER_CTRL_EN;
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return 0;
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}
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static int counter_tmr_cmsdk_apb_stop(struct device *dev)
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{
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const struct counter_tmr_cmsdk_apb_cfg * const cfg =
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dev->config->config_info;
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/* Disable the timer */
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cfg->timer->ctrl = 0x0;
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return 0;
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}
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static u32_t counter_tmr_cmsdk_apb_read(struct device *dev)
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{
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const struct counter_tmr_cmsdk_apb_cfg * const cfg =
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dev->config->config_info;
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/* Return Counter Value */
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u32_t value = 0U;
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value = TIMER_MAX_RELOAD - cfg->timer->value;
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return value;
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}
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static int counter_tmr_cmsdk_apb_set_alarm(struct device *dev,
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counter_callback_t callback,
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u32_t count, void *user_data)
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{
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return -ENODEV;
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}
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static const struct counter_driver_api counter_tmr_cmsdk_apb_api = {
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.start = counter_tmr_cmsdk_apb_start,
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.stop = counter_tmr_cmsdk_apb_stop,
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.read = counter_tmr_cmsdk_apb_read,
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.set_alarm = counter_tmr_cmsdk_apb_set_alarm,
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};
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static int counter_tmr_cmsdk_apb_init(struct device *dev)
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{
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#ifdef CONFIG_CLOCK_CONTROL
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/* Enable clock for subsystem */
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struct device *clk =
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device_get_binding(CONFIG_ARM_CLOCK_CONTROL_DEV_NAME);
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const struct counter_tmr_cmsdk_apb_cfg * const cfg =
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dev->config->config_info;
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#ifdef CONFIG_SOC_SERIES_BEETLE
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clock_control_on(clk, (clock_control_subsys_t *) &cfg->timer_cc_as);
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clock_control_on(clk, (clock_control_subsys_t *) &cfg->timer_cc_ss);
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clock_control_on(clk, (clock_control_subsys_t *) &cfg->timer_cc_dss);
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#endif /* CONFIG_SOC_SERIES_BEETLE */
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#else
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ARG_UNUSED(dev);
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#endif /* CONFIG_CLOCK_CONTROL */
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return 0;
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}
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/* COUNTER 0 */
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#ifdef CONFIG_COUNTER_TMR_CMSDK_APB_0
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static const struct counter_tmr_cmsdk_apb_cfg counter_tmr_cmsdk_apb_cfg_0 = {
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.timer = ((volatile struct timer_cmsdk_apb *)DT_CMSDK_APB_TIMER0),
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.timer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
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.device = DT_CMSDK_APB_TIMER0,},
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.timer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
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.device = DT_CMSDK_APB_TIMER0,},
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.timer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
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.device = DT_CMSDK_APB_TIMER0,},
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};
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DEVICE_AND_API_INIT(counter_tmr_cmsdk_apb_0,
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CONFIG_COUNTER_TMR_CMSDK_APB_0_DEV_NAME,
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counter_tmr_cmsdk_apb_init, NULL,
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&counter_tmr_cmsdk_apb_cfg_0, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&counter_tmr_cmsdk_apb_api);
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#endif /* CONFIG_COUNTER_TMR_CMSDK_APB_0 */
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/* COUNTER 1 */
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#ifdef CONFIG_COUNTER_TMR_CMSDK_APB_1
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static const struct counter_tmr_cmsdk_apb_cfg counter_tmr_cmsdk_apb_cfg_1 = {
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.timer = ((volatile struct timer_cmsdk_apb *)DT_CMSDK_APB_TIMER1),
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.timer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
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.device = DT_CMSDK_APB_TIMER1,},
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.timer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
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.device = DT_CMSDK_APB_TIMER1,},
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.timer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
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.device = DT_CMSDK_APB_TIMER1,},
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};
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DEVICE_AND_API_INIT(counter_tmr_cmsdk_apb_1,
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CONFIG_COUNTER_TMR_CMSDK_APB_1_DEV_NAME,
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counter_tmr_cmsdk_apb_init, NULL,
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&counter_tmr_cmsdk_apb_cfg_1, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&counter_tmr_cmsdk_apb_api);
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#endif /* CONFIG_COUNTER_TMR_CMSDK_APB_1 */
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