207 lines
6.2 KiB
C
207 lines
6.2 KiB
C
/* ieee802154_cc2520.h - Registers definition for TI CC2520 */
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/*
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* Copyright (c) 2016 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC2520_H_
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#define ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC2520_H_
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#include <linker/sections.h>
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#include <sys/atomic.h>
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#include <drivers/spi.h>
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enum cc2520_gpio_index {
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CC2520_GPIO_IDX_VREG_EN = 0,
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CC2520_GPIO_IDX_RESET,
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CC2520_GPIO_IDX_FIFO,
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CC2520_GPIO_IDX_CCA,
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CC2520_GPIO_IDX_SFD,
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CC2520_GPIO_IDX_FIFOP,
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CC2520_GPIO_IDX_MAX,
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};
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struct cc2520_gpio_configuration {
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struct device *dev;
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uint32_t pin;
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};
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/* Runtime context structure
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***************************
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*/
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struct cc2520_context {
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struct net_if *iface;
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/**************************/
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struct cc2520_gpio_configuration gpios[CC2520_GPIO_IDX_MAX];
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struct gpio_callback sfd_cb;
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struct gpio_callback fifop_cb;
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struct device *spi;
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struct spi_config spi_cfg;
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uint8_t mac_addr[8];
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/************TX************/
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struct k_sem tx_sync;
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atomic_t tx;
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/************RX************/
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K_THREAD_STACK_MEMBER(cc2520_rx_stack,
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CONFIG_IEEE802154_CC2520_RX_STACK_SIZE);
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struct k_thread cc2520_rx_thread;
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struct k_sem rx_lock;
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#ifdef CONFIG_IEEE802154_CC2520_CRYPTO
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struct k_sem access_lock;
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#endif
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bool overflow;
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};
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#include "ieee802154_cc2520_regs.h"
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/* Registers useful routines
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***************************
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*/
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bool z_cc2520_access(struct cc2520_context *ctx, bool read, uint8_t ins,
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uint16_t addr, void *data, size_t length);
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#define DEFINE_SREG_READ(__reg_name, __reg_addr) \
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static inline uint8_t read_reg_##__reg_name(struct cc2520_context *ctx) \
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{ \
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uint8_t val; \
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\
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if (z_cc2520_access(ctx, true, CC2520_INS_MEMRD, \
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__reg_addr, &val, 1)) { \
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return val; \
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} \
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\
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return 0; \
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}
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#define DEFINE_SREG_WRITE(__reg_name, __reg_addr) \
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static inline bool write_reg_##__reg_name(struct cc2520_context *ctx, \
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uint8_t val) \
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{ \
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return z_cc2520_access(ctx, false, CC2520_INS_MEMWR, \
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__reg_addr, &val, 1); \
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}
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#define DEFINE_FREG_READ(__reg_name, __reg_addr) \
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static inline uint8_t read_reg_##__reg_name(struct cc2520_context *ctx) \
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{ \
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uint8_t val; \
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\
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if (z_cc2520_access(ctx, true, CC2520_INS_REGRD, \
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__reg_addr, &val, 1)) { \
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return val; \
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} \
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\
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return 0; \
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}
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#define DEFINE_FREG_WRITE(__reg_name, __reg_addr) \
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static inline bool write_reg_##__reg_name(struct cc2520_context *ctx, \
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uint8_t val) \
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{ \
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return z_cc2520_access(ctx, false, CC2520_INS_REGWR, \
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__reg_addr, &val, 1); \
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}
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DEFINE_FREG_READ(excflag0, CC2520_FREG_EXCFLAG0)
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DEFINE_FREG_READ(excflag1, CC2520_FREG_EXCFLAG1)
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DEFINE_FREG_READ(excflag2, CC2520_FREG_EXCFLAG2)
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DEFINE_FREG_READ(gpioctrl0, CC2520_FREG_GPIOCTRL0)
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DEFINE_FREG_READ(gpioctrl1, CC2520_FREG_GPIOCTRL1)
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DEFINE_FREG_READ(gpioctrl2, CC2520_FREG_GPIOCTRL2)
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DEFINE_FREG_READ(gpioctrl3, CC2520_FREG_GPIOCTRL3)
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DEFINE_FREG_READ(gpioctrl4, CC2520_FREG_GPIOCTRL4)
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DEFINE_FREG_READ(gpioctrl5, CC2520_FREG_GPIOCTRL5)
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DEFINE_FREG_READ(gpiopolarity, CC2520_FREG_GPIOPOLARITY)
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DEFINE_FREG_READ(gpioctrl, CC2520_FREG_GPIOCTRL)
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DEFINE_FREG_READ(txfifocnt, CC2520_FREG_TXFIFOCNT)
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DEFINE_FREG_READ(rxfifocnt, CC2520_FREG_RXFIFOCNT)
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DEFINE_FREG_READ(dpustat, CC2520_FREG_DPUSTAT)
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DEFINE_FREG_WRITE(frmctrl0, CC2520_FREG_FRMCTRL0)
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DEFINE_FREG_WRITE(frmctrl1, CC2520_FREG_FRMCTRL1)
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DEFINE_FREG_WRITE(excflag0, CC2520_FREG_EXCFLAG0)
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DEFINE_FREG_WRITE(excflag1, CC2520_FREG_EXCFLAG1)
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DEFINE_FREG_WRITE(excflag2, CC2520_FREG_EXCFLAG2)
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DEFINE_FREG_WRITE(frmfilt0, CC2520_FREG_FRMFILT0)
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DEFINE_FREG_WRITE(frmfilt1, CC2520_FREG_FRMFILT1)
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DEFINE_FREG_WRITE(srcmatch, CC2520_FREG_SRCMATCH)
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DEFINE_FREG_WRITE(fifopctrl, CC2520_FREG_FIFOPCTRL)
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DEFINE_FREG_WRITE(freqctrl, CC2520_FREG_FREQCTRL)
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DEFINE_FREG_WRITE(txpower, CC2520_FREG_TXPOWER)
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DEFINE_FREG_WRITE(ccactrl0, CC2520_FREG_CCACTRL0)
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DEFINE_SREG_WRITE(mdmctrl0, CC2520_SREG_MDMCTRL0)
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DEFINE_SREG_WRITE(mdmctrl1, CC2520_SREG_MDMCTRL1)
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DEFINE_SREG_WRITE(rxctrl, CC2520_SREG_RXCTRL)
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DEFINE_SREG_WRITE(fsctrl, CC2520_SREG_FSCTRL)
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DEFINE_SREG_WRITE(fscal1, CC2520_SREG_FSCAL1)
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DEFINE_SREG_WRITE(agcctrl1, CC2520_SREG_AGCCTRL1)
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DEFINE_SREG_WRITE(adctest0, CC2520_SREG_ADCTEST0)
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DEFINE_SREG_WRITE(adctest1, CC2520_SREG_ADCTEST1)
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DEFINE_SREG_WRITE(adctest2, CC2520_SREG_ADCTEST2)
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DEFINE_SREG_WRITE(extclock, CC2520_SREG_EXTCLOCK)
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/* Memory useful routines
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************************
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*/
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#define DEFINE_MEM_WRITE(__mem_name, __addr, __sz) \
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static inline bool write_mem_##__mem_name(struct cc2520_context *ctx, \
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uint8_t *buf) \
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{ \
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return z_cc2520_access(ctx, false, CC2520_INS_MEMWR, \
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__addr, buf, __sz); \
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}
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DEFINE_MEM_WRITE(short_addr, CC2520_MEM_SHORT_ADDR, 2)
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DEFINE_MEM_WRITE(pan_id, CC2520_MEM_PAN_ID, 2)
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DEFINE_MEM_WRITE(ext_addr, CC2520_MEM_EXT_ADDR, 8)
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/* Instructions useful routines
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******************************
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*/
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static inline bool cc2520_command_strobe(struct cc2520_context *ctx,
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uint8_t instruction)
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{
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return z_cc2520_access(ctx, false, instruction, 0, NULL, 0);
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}
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static inline bool cc2520_command_strobe_snop(struct cc2520_context *ctx,
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uint8_t instruction)
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{
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uint8_t snop[1] = { CC2520_INS_SNOP };
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return z_cc2520_access(ctx, false, instruction, 0, snop, 1);
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}
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#define DEFINE_STROBE_INSTRUCTION(__ins_name, __ins) \
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static inline bool instruct_##__ins_name(struct cc2520_context *ctx) \
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{ \
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return cc2520_command_strobe(ctx, __ins); \
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}
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#define DEFINE_STROBE_SNOP_INSTRUCTION(__ins_name, __ins) \
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static inline bool instruct_##__ins_name(struct cc2520_context *ctx) \
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{ \
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return cc2520_command_strobe_snop(ctx, __ins); \
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}
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DEFINE_STROBE_INSTRUCTION(srxon, CC2520_INS_SRXON)
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DEFINE_STROBE_INSTRUCTION(srfoff, CC2520_INS_SRFOFF)
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DEFINE_STROBE_INSTRUCTION(stxon, CC2520_INS_STXON)
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DEFINE_STROBE_INSTRUCTION(stxoncca, CC2520_INS_STXONCCA)
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DEFINE_STROBE_INSTRUCTION(sflushrx, CC2520_INS_SFLUSHRX)
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DEFINE_STROBE_INSTRUCTION(sflushtx, CC2520_INS_SFLUSHTX)
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DEFINE_STROBE_INSTRUCTION(sxoscoff, CC2520_INS_SXOSCOFF)
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DEFINE_STROBE_SNOP_INSTRUCTION(sxoscon, CC2520_INS_SXOSCON)
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#endif /* ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC2520_H_ */
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