zephyr/soc/riscv/openisa_rv32m1
Ulf Magnusson fdb936adae openisa_rv32m1: kconfig: Remove base address/size symbols
RISCV_RV32M1_VECTOR_BASE_ADDR is unused after commit 34b0516466
("boards: riscv32: rv32m1_vega: enable MCUboot for ri5cy core") (it was
called RISCV32_RV32M1_BASE_ADDR then).

RISCV_RV32M1_VECTOR_SIZE is still used, but is always 0x100, so remove
it too.

These symbols were only defined in a Kconfig.defconfig file.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-11 12:44:47 -06:00
..
CMakeLists.txt
Kconfig kconfig: Clean up header comments and make them consistent 2019-11-04 17:31:27 -05:00
Kconfig.defconfig openisa_rv32m1: kconfig: Remove base address/size symbols 2019-12-11 12:44:47 -06:00
Kconfig.soc kconfig: Clean up header comments and make them consistent 2019-11-04 17:31:27 -05:00
dts_fixup.h
linker.ld openisa_rv32m1: kconfig: Remove base address/size symbols 2019-12-11 12:44:47 -06:00
soc.c kernel: rename z_arch_ to arch_ 2019-11-07 15:21:46 -08:00
soc.h
soc_context.h
soc_irq.S
soc_offsets.h
soc_ri5cy.h
soc_zero_riscy.h
vector.S
wdog.S